From 49226692e50cf272d7425c82c5c48016ffc23b56 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 14 Oct 2025 23:13:13 +0300 Subject: [PATCH] brw: fix invalid sparse bitfield offset computation dest_size is the number of outputs to be provided into the IR, but the location of the sparse bitfield in the dst temporary SEND destination might be different (shorter due to masking of unused components computed above). Signed-off-by: Lionel Landwerlin Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14094 Reviewed-by: Alyssa Rosenzweig Part-of: --- src/intel/compiler/brw/brw_from_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw/brw_from_nir.cpp b/src/intel/compiler/brw/brw_from_nir.cpp index 2a6622cf4eb..316359ae89d 100644 --- a/src/intel/compiler/brw/brw_from_nir.cpp +++ b/src/intel/compiler/brw/brw_from_nir.cpp @@ -7755,7 +7755,7 @@ brw_from_nir_emit_texture(nir_to_brw_state &ntb, /* The residency bits are only in the first component. */ if (instr->is_sparse) { nir_dest[dest_size - 1] = - component(offset(dst, bld, dest_size - 1), 0); + component(offset(dst, bld, dest_comp), 0); } bld.LOAD_PAYLOAD(nir_def_reg, nir_dest, dest_size, 0);