util: fix (re-enable) L3 cache pinning

cores_per_L3 was uninitialized, so it was always disabled.
Remove the variable and do it differently.

Fixes: 11d2db17c5 - util: rework AMD cpu L3 cache affinity code.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10526>
This commit is contained in:
Marek Olšák
2021-04-28 21:27:02 -04:00
parent 9b58e31f2d
commit 48d2ac4e88
4 changed files with 4 additions and 4 deletions
-1
View File
@@ -435,7 +435,6 @@ static void
get_cpu_topology(void)
{
/* Default. This is OK if L3 is not present or there is only one. */
util_cpu_caps.cores_per_L3 = util_cpu_caps.nr_cpus;
util_cpu_caps.num_L3_caches = 1;
memset(util_cpu_caps.cpu_to_L3, 0xff, sizeof(util_cpu_caps.cpu_to_L3));
-1
View File
@@ -97,7 +97,6 @@ struct util_cpu_caps_t {
unsigned has_avx512vbmi:1;
unsigned num_L3_caches;
unsigned cores_per_L3;
unsigned num_cpu_mask_bits;
uint16_t cpu_to_L3[UTIL_MAX_CPUS];