From 46e9fe6981ee543b26c3344d53737712afb3eba7 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Tue, 19 Nov 2024 13:06:35 -0800 Subject: [PATCH] intel/brw: Add TGL_PIPE_SCALAR value Add the enum value for the (in-order) scalar pipe. Reviewed-by: Lionel Landwerlin Reviewed-by: Ian Romanick Part-of: --- src/intel/compiler/brw_disasm.c | 3 ++- src/intel/compiler/brw_eu_defines.h | 5 +++++ src/intel/compiler/brw_print.cpp | 3 ++- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 8efd54610a7..e6db7877338 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -1879,7 +1879,8 @@ swsb(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) swsb.pipe == TGL_PIPE_INT ? "I" : swsb.pipe == TGL_PIPE_LONG ? "L" : swsb.pipe == TGL_PIPE_ALL ? "A" : - swsb.pipe == TGL_PIPE_MATH ? "M" : "" ), + swsb.pipe == TGL_PIPE_MATH ? "M" : + swsb.pipe == TGL_PIPE_SCALAR ? "S" : "" ), swsb.regdist); if (swsb.mode) format(file, " $%d%s", swsb.sbid, diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 4fde4dc5539..ed757e0824b 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -895,6 +895,9 @@ operator|=(tgl_sbid_mode &x, tgl_sbid_mode y) * the hardware to infer the pipeline based on the source types of the * instruction. TGL_PIPE_ALL can be used when synchronization with all ALU * pipelines is intended. + * + * Xe3 adds TGL_PIPE_SCALAR for a very specific use case (writing immediates + * to scalar register). */ enum tgl_pipe { TGL_PIPE_NONE = 0, @@ -902,6 +905,7 @@ enum tgl_pipe { TGL_PIPE_INT, TGL_PIPE_LONG, TGL_PIPE_MATH, + TGL_PIPE_SCALAR, TGL_PIPE_ALL }; @@ -989,6 +993,7 @@ tgl_swsb_encode(const struct intel_device_info *devinfo, swsb.pipe == TGL_PIPE_INT ? 0x18 : swsb.pipe == TGL_PIPE_LONG ? 0x20 : swsb.pipe == TGL_PIPE_MATH ? 0x28 : + swsb.pipe == TGL_PIPE_SCALAR ? 0x30 : swsb.pipe == TGL_PIPE_ALL ? 0x8 : 0; return pipe | swsb.regdist; diff --git a/src/intel/compiler/brw_print.cpp b/src/intel/compiler/brw_print.cpp index be7d6f77bce..423dc23180f 100644 --- a/src/intel/compiler/brw_print.cpp +++ b/src/intel/compiler/brw_print.cpp @@ -651,7 +651,8 @@ brw_print_swsb(FILE *f, const struct intel_device_info *devinfo, const tgl_swsb swsb.pipe == TGL_PIPE_INT ? "I" : swsb.pipe == TGL_PIPE_LONG ? "L" : swsb.pipe == TGL_PIPE_ALL ? "A" : - swsb.pipe == TGL_PIPE_MATH ? "M" : "" ), + swsb.pipe == TGL_PIPE_MATH ? "M" : + swsb.pipe == TGL_PIPE_SCALAR ? "S" : "" ), swsb.regdist); }