From 46e843f76ea11327cf97ecae6c7d917479013438 Mon Sep 17 00:00:00 2001
From: Jordan Justen <jordan.l.justen@intel.com>
Date: Sat, 17 Aug 2024 20:56:52 -0700
Subject: [PATCH] intel/brw: Add brw_data_type_float/brw_data_type_int

These type encodings were first were used in dpas instructions, but
continue to be used in more places.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39007>
---
 src/intel/compiler/brw/brw_reg_type.h | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/src/intel/compiler/brw/brw_reg_type.h b/src/intel/compiler/brw/brw_reg_type.h
index aa45477d6f0..607df6c46ff 100644
--- a/src/intel/compiler/brw/brw_reg_type.h
+++ b/src/intel/compiler/brw/brw_reg_type.h
@@ -188,6 +188,33 @@ brw_type_larger_of(enum brw_reg_type a, enum brw_reg_type b)
 
 /* -------------------------------------------------------------- */
 
+/**
+ * Enum for float data types.
+ */
+enum PACKED brw_data_type_float {
+   BRW_TYPE_FLOAT_BF8   = 0,
+   BRW_TYPE_FLOAT_HF    = 1,
+   BRW_TYPE_FLOAT_F     = 2,
+   BRW_TYPE_FLOAT_DF    = 3,
+   BRW_TYPE_FLOAT_HF8   = 4,
+   BRW_TYPE_FLOAT_BF    = 5,
+   BRW_TYPE_FLOAT_TF32  = 6,
+};
+
+/**
+ * Enum for integer data types.
+ */
+enum PACKED brw_data_type_int {
+   BRW_TYPE_INT_UB      = 0,
+   BRW_TYPE_INT_UW      = 1,
+   BRW_TYPE_INT_UD      = 2,
+   BRW_TYPE_INT_UQ      = 3,
+   BRW_TYPE_INT_B       = 4,
+   BRW_TYPE_INT_W       = 5,
+   BRW_TYPE_INT_D       = 6,
+   BRW_TYPE_INT_Q       = 7,
+};
+
 unsigned
 brw_type_encode(const struct intel_device_info *devinfo,
                 enum brw_reg_file file, enum brw_reg_type type);