From 46e330c07e4f2140b3ae3e919994f03f36dbb4bf Mon Sep 17 00:00:00 2001 From: Iago Toral Quiroga Date: Wed, 9 Mar 2022 10:38:42 +0100 Subject: [PATCH] nir/schedule: fix handling of generic memory barrier MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We can get a generic nir_intrinsic_memory_barrier to represent a barrier involving multiple semantics (instead of getting individual specific barriers for each semantic). This means that we need to consider these as potentially affecting shared memory access as well. Reviewed-by: Alejandro Piñeiro Part-of: --- src/compiler/nir/nir_schedule.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/compiler/nir/nir_schedule.c b/src/compiler/nir/nir_schedule.c index 8ae4fb2f1d8..4f1db1a0a72 100644 --- a/src/compiler/nir/nir_schedule.c +++ b/src/compiler/nir/nir_schedule.c @@ -403,6 +403,10 @@ nir_schedule_intrinsic_deps(nir_deps_state *state, case nir_intrinsic_control_barrier: case nir_intrinsic_memory_barrier_shared: + /* A generic memory barrier can be emitted when multiple synchronization + * semantics are involved, including shared memory. + */ + case nir_intrinsic_memory_barrier: add_write_dep(state, &state->store_shared, n); /* Serialize against ssbos/atomics/etc. */