freedreno/a6xx: Consolidate more of dword 0 building in fd6_draw_vbo

There's already a bit of duplicated logic here and tessellation will
add more. Build up dword 0 in fd6_draw_vbo() and drop the a4xx in the
process.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kristian H. Kristensen
2019-06-03 14:12:59 -07:00
committed by Rob Clark
parent cae6b4d741
commit 4552162e2d
+25 -32
View File
@@ -40,12 +40,9 @@
#include "fd6_format.h"
#include "fd6_zsa.h"
/* some bits in common w/ a4xx: */
#include "a4xx/fd4_draw.h"
static void
draw_emit_indirect(struct fd_batch *batch, struct fd_ringbuffer *ring,
enum pc_di_primtype primtype,
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
{
@@ -56,9 +53,7 @@ draw_emit_indirect(struct fd_batch *batch, struct fd_ringbuffer *ring,
unsigned max_indicies = idx->width0 / info->index_size;
OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
fd4_size2indextype(info->index_size), 0),
&batch->draw_patches);
OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RELOC(ring, fd_resource(idx)->bo,
index_offset, 0, 0);
// XXX: Check A5xx vs A6xx
@@ -66,15 +61,14 @@ draw_emit_indirect(struct fd_batch *batch, struct fd_ringbuffer *ring,
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
} else {
OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
&batch->draw_patches);
OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
}
}
static void
draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
enum pc_di_primtype primtype,
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
{
@@ -85,31 +79,16 @@ draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
uint32_t idx_size = info->index_size * info->count;
uint32_t idx_offset = index_offset + info->start * info->index_size;
/* leave vis mode blank for now, it will be patched up when
* we know if we are binning or not
*/
uint32_t draw = CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(primtype) |
CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(DI_SRC_SEL_DMA) |
CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(fd4_size2indextype(info->index_size)) |
0x2000;
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 7);
OUT_RINGP(ring, draw, &batch->draw_patches);
OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
OUT_RING(ring, 0x0); /* XXX */
OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
OUT_RING (ring, idx_size);
} else {
/* leave vis mode blank for now, it will be patched up when
* we know if we are binning or not
*/
uint32_t draw = CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(primtype) |
CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(DI_SRC_SEL_AUTO_INDEX) |
0x2000;
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 3);
OUT_RINGP(ring, draw, &batch->draw_patches);
OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
}
@@ -225,12 +204,26 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
*/
emit_marker6(ring, 7);
if (info->indirect) {
draw_emit_indirect(ctx->batch, ring, primtype,
info, index_offset);
/* leave vis mode blank for now, it will be patched up when
* we know if we are binning or not
*/
uint32_t draw0 =
CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(primtype) |
0x2000;
if (info->index_size) {
draw0 |=
CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(DI_SRC_SEL_DMA) |
CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(fd4_size2indextype(info->index_size));
} else {
draw_emit(ctx->batch, ring, primtype,
info, index_offset);
draw0 |=
CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(DI_SRC_SEL_AUTO_INDEX);
}
if (info->indirect) {
draw_emit_indirect(ctx->batch, ring, draw0, info, index_offset);
} else {
draw_emit(ctx->batch, ring, draw0, info, index_offset);
}
emit_marker6(ring, 7);