From 44ab4ad732c59a5acaa6826834462fd5adeba9b7 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Tue, 4 Mar 2025 17:44:25 +0000 Subject: [PATCH] aco: align scratch size after isel Make it safe for VGPR spilling if it's not a multiple of 4. Signed-off-by: Rhys Perry Reviewed-by: Georg Lehmann Part-of: --- src/amd/compiler/instruction_selection/aco_isel_setup.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/compiler/instruction_selection/aco_isel_setup.cpp b/src/amd/compiler/instruction_selection/aco_isel_setup.cpp index 75a33bfca12..082845fec4a 100644 --- a/src/amd/compiler/instruction_selection/aco_isel_setup.cpp +++ b/src/amd/compiler/instruction_selection/aco_isel_setup.cpp @@ -760,7 +760,7 @@ setup_isel_context(Program* program, unsigned shader_count, struct nir_shader* c for (unsigned i = 0; i < shader_count; i++) scratch_size = std::max(scratch_size, shaders[i]->scratch_size); - ctx.program->config->scratch_bytes_per_wave = scratch_size * ctx.program->wave_size; + ctx.program->config->scratch_bytes_per_wave = align(scratch_size, 4) * ctx.program->wave_size; unsigned nir_num_blocks = 0; for (unsigned i = 0; i < shader_count; i++)