From 4439101dd3816c537ca93947791cf63a63e6bca9 Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Tue, 2 Dec 2025 13:06:25 -0800 Subject: [PATCH] tu: Template tu6_emit_window_scissor by CHIP. This lets us set the right registers on 8xx. Part-of: --- src/freedreno/vulkan/tu_clear_blit.cc | 2 +- src/freedreno/vulkan/tu_cmd_buffer.cc | 18 ++++++++++-------- src/freedreno/vulkan/tu_cmd_buffer.h | 1 + 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/src/freedreno/vulkan/tu_clear_blit.cc b/src/freedreno/vulkan/tu_clear_blit.cc index 44a8fbcae69..10066838f08 100644 --- a/src/freedreno/vulkan/tu_clear_blit.cc +++ b/src/freedreno/vulkan/tu_clear_blit.cc @@ -1578,7 +1578,7 @@ r3d_setup(struct tu_cmd_buffer *cmd, if (!cmd->state.pass) { tu_emit_cache_flush_ccu(cmd, cs, TU_CMD_CCU_SYSMEM); - tu6_emit_window_scissor(cs, 0, 0, 0x3fff, 0x3fff); + tu6_emit_window_scissor(cs, 0, 0, 0x3fff, 0x3fff); if (cmd->device->physical_device->info->props.has_hw_bin_scaling) { tu_cs_emit_regs(cs, A7XX_GRAS_BIN_FOVEAT()); tu_cs_emit_regs(cs, A7XX_RB_BIN_FOVEAT()); diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 2ac4f1fe865..4dbd2378d5a 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -1004,6 +1004,7 @@ tu6_emit_blit_scissor(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool align, } } +template void tu6_emit_window_scissor(struct tu_cs *cs, uint32_t x1, @@ -1012,13 +1013,14 @@ tu6_emit_window_scissor(struct tu_cs *cs, uint32_t y2) { tu_cs_emit_regs(cs, - A6XX_GRAS_SC_WINDOW_SCISSOR_TL(.x = x1, .y = y1), - A6XX_GRAS_SC_WINDOW_SCISSOR_BR(.x = x2, .y = y2)); + GRAS_SC_WINDOW_SCISSOR_TL(CHIP, .x = x1, .y = y1), + GRAS_SC_WINDOW_SCISSOR_BR(CHIP, .x = x2, .y = y2)); tu_cs_emit_regs(cs, - A6XX_GRAS_A2D_SCISSOR_TL(.x = x1, .y = y1), - A6XX_GRAS_A2D_SCISSOR_BR(.x = x2, .y = y2)); + GRAS_A2D_SCISSOR_TL(CHIP, .x = x1, .y = y1), + GRAS_A2D_SCISSOR_BR(CHIP, .x = x2, .y = y2)); } +TU_GENX(tu6_emit_window_scissor); template void @@ -1498,9 +1500,9 @@ tu6_emit_tile_select(struct tu_cmd_buffer *cmd, */ uint32_t width = fb->width + tiling->tile0.width; uint32_t height = fb->height + tiling->tile0.height; - tu6_emit_window_scissor(cs, 0, 0, width, height); + tu6_emit_window_scissor(cs, 0, 0, width, height); } else { - tu6_emit_window_scissor(cs, x1, y1, x2 - 1, y2 - 1); + tu6_emit_window_scissor(cs, x1, y1, x2 - 1, y2 - 1); } tu6_emit_window_offset(cs, x1, y1); @@ -2431,7 +2433,7 @@ tu6_emit_binning_pass(struct tu_cmd_buffer *cmd, struct tu_cs *cs, uint32_t width = fb->width + (fdm_offsets ? tiling->tile0.width : 0); uint32_t height = fb->height + (fdm_offsets ? tiling->tile0.height : 0); - tu6_emit_window_scissor(cs, 0, 0, width - 1, height - 1); + tu6_emit_window_scissor(cs, 0, 0, width - 1, height - 1); tu_cs_emit_pkt7(cs, CP_SET_MARKER, 1); tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_VISIBILITY)); @@ -2956,7 +2958,7 @@ tu6_sysmem_render_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs, } assert(fb->width > 0 && fb->height > 0); - tu6_emit_window_scissor(cs, 0, 0, fb->width - 1, fb->height - 1); + tu6_emit_window_scissor(cs, 0, 0, fb->width - 1, fb->height - 1); tu6_emit_window_offset(cs, 0, 0); tu6_emit_bin_size(cs, 0, 0, { diff --git a/src/freedreno/vulkan/tu_cmd_buffer.h b/src/freedreno/vulkan/tu_cmd_buffer.h index 52facaf615f..fd8c4b28fb1 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.h +++ b/src/freedreno/vulkan/tu_cmd_buffer.h @@ -838,6 +838,7 @@ tu_get_descriptors_state(struct tu_cmd_buffer *cmd_buffer, void tu6_emit_msaa(struct tu_cs *cs, VkSampleCountFlagBits samples, bool msaa_disable); +template void tu6_emit_window_scissor(struct tu_cs *cs, uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2); void tu6_emit_window_offset(struct tu_cs *cs, uint32_t x1, uint32_t y1);