diff --git a/src/amd/common/nir/ac_nir_create_gs_copy_shader.c b/src/amd/common/nir/ac_nir_create_gs_copy_shader.c
index e80e7f09bd9..a7a34b8dceb 100644
--- a/src/amd/common/nir/ac_nir_create_gs_copy_shader.c
+++ b/src/amd/common/nir/ac_nir_create_gs_copy_shader.c
@@ -54,7 +54,8 @@ ac_nir_create_gs_copy_shader(const nir_shader *gs_nir, ac_nir_lower_legacy_gs_op
             out->outputs[i][j] =
                nir_load_buffer_amd(&b, 1, 32, gsvs_ring, vtx_offset, zero, zero,
                                    .base = base,
-                                   .access = ACCESS_COHERENT | ACCESS_NON_TEMPORAL);
+                                   .access = ACCESS_COHERENT | ACCESS_NON_TEMPORAL |
+                                             ACCESS_CAN_REORDER | ACCESS_CAN_SPECULATE);
             offset += 4;
          }
       }
diff --git a/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c b/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c
index 1244889f4c6..6e3d4135b28 100644
--- a/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c
+++ b/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c
@@ -64,13 +64,15 @@ emit_split_buffer_load(nir_builder *b, unsigned num_components, unsigned bit_siz
    for (unsigned i = 0; i < full_dwords; ++i)
       comps[i] = nir_load_buffer_amd(b, 1, 32, desc, v_off, s_off, zero,
                                      .base = component_stride * i, .memory_modes = nir_var_shader_in,
-                                     .access = ACCESS_COHERENT);
+                                     .access = ACCESS_COHERENT | ACCESS_CAN_REORDER |
+                                               ACCESS_CAN_SPECULATE);
 
    if (remaining_bytes)
       comps[full_dwords] = nir_load_buffer_amd(b, 1, remaining_bytes * 8, desc, v_off, s_off, zero,
                                                .base = component_stride * full_dwords,
                                                .memory_modes = nir_var_shader_in,
-                                               .access = ACCESS_COHERENT);
+                                               .access = ACCESS_COHERENT | ACCESS_CAN_REORDER |
+                                                         ACCESS_CAN_SPECULATE);
 
    return nir_extract_bits(b, comps, full_dwords + !!remaining_bytes, 0, num_components, bit_size);
 }
diff --git a/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c b/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c
index a542cdecac2..19e7ef652aa 100644
--- a/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c
+++ b/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c
@@ -1499,7 +1499,8 @@ lower_tes_input_load(nir_builder *b,
    nir_def *load = NULL;
 
    AC_NIR_LOAD_IO(load, b, intrin->def.num_components, intrin->def.bit_size, io_sem.high_16bits,
-                  nir_load_buffer_amd, offchip_ring, off, offchip_offset, zero, .access = ACCESS_COHERENT,
+                  nir_load_buffer_amd, offchip_ring, off, offchip_offset, zero,
+                  .access = ACCESS_COHERENT | ACCESS_CAN_REORDER | ACCESS_CAN_SPECULATE,
                   .memory_modes = nir_var_shader_in);
 
    return load;