From 43ab997951f5881f60f5a592fa3a4bb114040591 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 10 Apr 2024 23:31:26 -0700 Subject: [PATCH] intel/brw: Update instructions_match() to compare more fields We were missing the following "newer" fields: - ex_desc - predicate_trivial - sdepth - rcount - writes_accumulator - no_dd_clear - no_dd_check - check_tdr - send_is_volatile - send_ex_desc_scratch - send_ex_bso - last_rt - keep_payload_trailing_zeroes - has_packed_lod_ai_src We can actually just check ex_desc and the new "bits" union to handle most of them with fewer checks. Reviewed-by: Caio Oliveira Part-of: --- src/intel/compiler/brw_fs_cse.cpp | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/src/intel/compiler/brw_fs_cse.cpp b/src/intel/compiler/brw_fs_cse.cpp index e8d0ecb149b..2b12a0f6d84 100644 --- a/src/intel/compiler/brw_fs_cse.cpp +++ b/src/intel/compiler/brw_fs_cse.cpp @@ -197,29 +197,23 @@ static bool instructions_match(fs_inst *a, fs_inst *b, bool *negate) { return a->opcode == b->opcode && - a->force_writemask_all == b->force_writemask_all && a->exec_size == b->exec_size && a->group == b->group && - a->saturate == b->saturate && a->predicate == b->predicate && - a->predicate_inverse == b->predicate_inverse && a->conditional_mod == b->conditional_mod && - a->flag_subreg == b->flag_subreg && a->dst.type == b->dst.type && a->offset == b->offset && a->mlen == b->mlen && a->ex_mlen == b->ex_mlen && a->sfid == b->sfid && a->desc == b->desc && + a->ex_desc == b->ex_desc && a->size_written == b->size_written && a->check_tdr == b->check_tdr && - a->send_has_side_effects == b->send_has_side_effects && - a->eot == b->eot && a->header_size == b->header_size && - a->shadow_compare == b->shadow_compare && - a->pi_noperspective == b->pi_noperspective && a->target == b->target && a->sources == b->sources && + a->bits == b->bits && operands_match(a, b, negate); }