diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index dc80d5d16ab..4dfd6a9f686 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -346,8 +346,6 @@ struct anv_pipeline_stage { bool uses_bt_for_push_descs; - bool view_index_from_device_index; - enum anv_dynamic_push_bits dynamic_push_values; union brw_any_prog_data prog_data; @@ -716,8 +714,6 @@ anv_pipeline_hash_graphics(struct anv_graphics_base_pipeline *pipeline, _mesa_sha1_update(&ctx, stages[s].shader_sha1, sizeof(stages[s].shader_sha1)); _mesa_sha1_update(&ctx, &stages[s].key, brw_prog_key_size(s)); - bool vi_from_di = stages[s].view_index_from_device_index; - _mesa_sha1_update(&ctx, &vi_from_di, sizeof(vi_from_di)); } } @@ -1918,8 +1914,6 @@ anv_graphics_lib_retain_shaders(struct anv_graphics_base_pipeline *pipeline, sizeof(stages[s].shader_sha1)); lib->retained_shaders[s].subgroup_size_type = stages[s].subgroup_size_type; - lib->retained_shaders[s].view_index_from_device_index = - stages[s].view_index_from_device_index; nir_shader *nir = stages[s].nir != NULL ? stages[s].nir : stages[s].imported.nir; assert(nir != NULL); @@ -2097,9 +2091,6 @@ anv_pipeline_nir_preprocess(struct anv_pipeline *pipeline, struct anv_device *device = pipeline->device; const struct brw_compiler *compiler = device->physical->compiler; - if (stage->view_index_from_device_index) - NIR_PASS(_, stage->nir, nir_lower_view_index_to_device_index); - const struct nir_lower_sysvals_to_varyings_options sysvals_to_varyings = { .point_coord = true, }; @@ -2202,9 +2193,6 @@ anv_graphics_pipeline_compile(struct anv_graphics_base_pipeline *pipeline, const struct intel_device_info *devinfo = device->info; const struct brw_compiler *compiler = device->physical->compiler; - bool view_index_from_device_index = - (pipeline->base.flags & VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR) != 0; - /* Setup the shaders given in this VkGraphicsPipelineCreateInfo::pStages[]. * Other shaders imported from libraries should have been added by * anv_graphics_pipeline_import_lib(). @@ -2224,7 +2212,6 @@ anv_graphics_pipeline_compile(struct anv_graphics_base_pipeline *pipeline, stages[stage].pipeline_pNext = info->pNext; stages[stage].info = &info->pStages[i]; stages[stage].feedback_idx = shader_count++; - stages[stage].view_index_from_device_index = view_index_from_device_index; anv_stage_write_shader_hash(&stages[stage], device); } @@ -3050,8 +3037,6 @@ anv_graphics_pipeline_import_lib(struct anv_graphics_base_pipeline *pipeline, stages[s].source_hash = lib->base.source_hashes[s]; stages[s].subgroup_size_type = lib->retained_shaders[s].subgroup_size_type; - stages[s].view_index_from_device_index = - lib->retained_shaders[s].view_index_from_device_index; stages[s].imported.nir = lib->retained_shaders[s].nir; stages[s].imported.bin = lib->base.shaders[s]; } diff --git a/src/vulkan/runtime/vk_pipeline.c b/src/vulkan/runtime/vk_pipeline.c index da89dbca81f..acc344af330 100644 --- a/src/vulkan/runtime/vk_pipeline.c +++ b/src/vulkan/runtime/vk_pipeline.c @@ -182,6 +182,9 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device, if (nir == NULL) return vk_errorf(device, VK_ERROR_UNKNOWN, "spirv_to_nir failed"); + if (pipeline_flags & VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR) + NIR_PASS(_, nir, nir_lower_view_index_to_device_index); + *nir_out = nir; return VK_SUCCESS; @@ -220,6 +223,10 @@ vk_pipeline_hash_shader_stage(VkPipelineCreateFlags2KHR pipeline_flags, _mesa_sha1_init(&ctx); + /* We only care about one of the pipeline flags */ + pipeline_flags &= VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR; + _mesa_sha1_update(&ctx, &pipeline_flags, sizeof(pipeline_flags)); + _mesa_sha1_update(&ctx, &info->flags, sizeof(info->flags)); assert(util_bitcount(info->stage) == 1); @@ -822,16 +829,6 @@ vk_pipeline_precompile_shader(struct vk_device *device, uint8_t stage_sha1[SHA1_DIGEST_LENGTH]; vk_pipeline_hash_shader_stage(pipeline_flags, info, &rs, stage_sha1); - /* This bit affects shader compilation but isn't taken into account in - * vk_pipeline_hash_shader_stage(). Re-hash the SHA1 if it's set. - */ - if (pipeline_flags & VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR) { - struct mesa_sha1 ctx; - _mesa_sha1_init(&ctx); - _mesa_sha1_update(&ctx, stage_sha1, sizeof(stage_sha1)); - _mesa_sha1_final(&ctx, stage_sha1); - } - if (cache != NULL) { struct vk_pipeline_cache_object *cache_obj = vk_pipeline_cache_lookup_object(cache, stage_sha1, sizeof(stage_sha1), @@ -860,9 +857,6 @@ vk_pipeline_precompile_shader(struct vk_device *device, if (result != VK_SUCCESS) return result; - if (pipeline_flags & VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR) - NIR_PASS(_, nir, nir_lower_view_index_to_device_index); - if (ops->preprocess_nir != NULL) ops->preprocess_nir(device->physical, nir);