diff --git a/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c b/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c
index c6338d29f2f..1e11fb12fc9 100644
--- a/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c
+++ b/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c
@@ -153,19 +153,26 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf)
             return;
       }
 
-      for (uint32_t i = 0; i < batch->fb.layer_count; i++) {
+      uint32_t view_mask = cmdbuf->state.gfx.render.view_mask;
+      assert(view_mask == 0 || util_bitcount(view_mask) <= batch->fb.layer_count);
+      uint32_t enabled_layer_count = view_mask ?
+         util_bitcount(view_mask) :
+         batch->fb.layer_count;
+
+      for (uint32_t i = 0; i < enabled_layer_count; i++) {
+         uint32_t layer_id = (view_mask != 0) ? u_bit_scan(&view_mask) : i;
          VkResult result;
 
-         uint64_t fbd = batch->fb.desc.gpu + (batch->fb.desc_stride * i);
+         uint64_t fbd = batch->fb.desc.gpu + (batch->fb.desc_stride * layer_id);
 
-         result = panvk_per_arch(cmd_prepare_tiler_context)(cmdbuf, i);
+         result = panvk_per_arch(cmd_prepare_tiler_context)(cmdbuf, layer_id);
          if (result != VK_SUCCESS)
             break;
 
          fbd |= GENX(pan_emit_fbd)(
-            &cmdbuf->state.gfx.render.fb.info, i, &batch->tlsinfo,
+            &cmdbuf->state.gfx.render.fb.info, layer_id, &batch->tlsinfo,
             &batch->tiler.ctx,
-            batch->fb.desc.cpu + (batch->fb.desc_stride * i));
+            batch->fb.desc.cpu + (batch->fb.desc_stride * layer_id));
 
          result = panvk_cmd_prepare_fragment_job(cmdbuf, fbd);
          if (result != VK_SUCCESS)
diff --git a/src/panfrost/vulkan/jm/panvk_vX_cmd_draw.c b/src/panfrost/vulkan/jm/panvk_vX_cmd_draw.c
index 213a7ec1aef..941a3ebf245 100644
--- a/src/panfrost/vulkan/jm/panvk_vX_cmd_draw.c
+++ b/src/panfrost/vulkan/jm/panvk_vX_cmd_draw.c
@@ -1308,14 +1308,21 @@ panvk_cmd_draw(struct panvk_cmd_buffer *cmdbuf, struct panvk_draw_data *draw)
    if (result != VK_SUCCESS)
       return;
 
-   for (uint32_t i = 0; i < layer_count; i++) {
-      draw->info.layer_id = i;
+
+   uint32_t view_mask = cmdbuf->state.gfx.render.view_mask;
+   assert(view_mask == 0 || util_bitcount(view_mask) <= batch->fb.layer_count);
+   uint32_t enabled_layer_count = view_mask ?
+     util_bitcount(view_mask) :
+     cmdbuf->state.gfx.render.layer_count;
+
+   for (uint32_t i = 0; i < enabled_layer_count; i++) {
       result = panvk_draw_prepare_varyings(cmdbuf, draw);
       if (result != VK_SUCCESS)
          return;
 
-      if (i > 0) {
-         cmdbuf->state.gfx.sysvals.layer_id = i;
+      draw->info.layer_id = (view_mask != 0) ? u_bit_scan(&view_mask) : i;
+      if (draw->info.layer_id > 0) {
+         cmdbuf->state.gfx.sysvals.layer_id = draw->info.layer_id;
          gfx_state_set_dirty(cmdbuf, FS_PUSH_UNIFORMS);
       }
 
diff --git a/src/panfrost/vulkan/panvk_vX_cmd_meta.c b/src/panfrost/vulkan/panvk_vX_cmd_meta.c
index 6e5cc6c7cfe..787afd22d9f 100644
--- a/src/panfrost/vulkan/panvk_vX_cmd_meta.c
+++ b/src/panfrost/vulkan/panvk_vX_cmd_meta.c
@@ -201,9 +201,6 @@ panvk_per_arch(CmdClearAttachments)(VkCommandBuffer commandBuffer,
       .depth_attachment_format = cmdbuf->state.gfx.render.z_attachment.fmt,
       .stencil_attachment_format = cmdbuf->state.gfx.render.s_attachment.fmt,
    };
-   /* Multiview is not supported pre-v10 */
-   assert(cmdbuf->state.gfx.render.view_mask == 0 || PAN_ARCH >= 10);
-
    for (uint32_t i = 0; i < render.color_attachment_count; i++) {
        render.color_attachment_formats[i] =
           cmdbuf->state.gfx.render.color_attachments.fmts[i];
diff --git a/src/panfrost/vulkan/panvk_vX_shader.c b/src/panfrost/vulkan/panvk_vX_shader.c
index a152ff5bd0b..4da80be1bd6 100644
--- a/src/panfrost/vulkan/panvk_vX_shader.c
+++ b/src/panfrost/vulkan/panvk_vX_shader.c
@@ -116,6 +116,13 @@ panvk_lower_sysvals(nir_builder *b, nir_instr *instr, void *data)
       assert(b->shader->info.stage == MESA_SHADER_FRAGMENT);
       val = load_sysval(b, graphics, bit_size, layer_id);
       break;
+   case nir_intrinsic_load_view_index:
+      assert(b->shader->info.stage != MESA_SHADER_COMPUTE);
+      if (ctx->state->rp->view_mask == 0)
+         val = nir_imm_zero(b, 1, 32);
+      else
+         val = load_sysval(b, graphics, bit_size, layer_id);
+      break;
 #endif
 
    case nir_intrinsic_load_draw_id: