From 40437bea860bd478692bb769789c1007dee5f5e5 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Thu, 15 Feb 2024 15:22:53 -0800 Subject: [PATCH] intel/brw: Remove pass test cases for Gfx8- And update the mock devinfo versions to be at least Gfx9. Acked-by: Ivan Briano Part-of: --- .../compiler/test_fs_cmod_propagation.cpp | 92 +------------------ .../compiler/test_fs_copy_propagation.cpp | 2 +- .../compiler/test_fs_saturate_propagation.cpp | 2 +- 3 files changed, 4 insertions(+), 92 deletions(-) diff --git a/src/intel/compiler/test_fs_cmod_propagation.cpp b/src/intel/compiler/test_fs_cmod_propagation.cpp index c82c55431f2..f23c841e931 100644 --- a/src/intel/compiler/test_fs_cmod_propagation.cpp +++ b/src/intel/compiler/test_fs_cmod_propagation.cpp @@ -85,7 +85,7 @@ cmod_propagation_test::cmod_propagation_test() bld = fs_builder(v).at_end(); - devinfo->ver = 7; + devinfo->ver = 9; devinfo->verx10 = devinfo->ver * 10; } @@ -3090,7 +3090,7 @@ TEST_F(cmod_propagation_test, cmp_to_add_float_le) EXPECT_EQ(BRW_CONDITIONAL_LE, instruction(block0, 0)->conditional_mod); } -TEST_F(cmod_propagation_test, prop_across_sel_gfx7) +TEST_F(cmod_propagation_test, prop_across_sel) { fs_reg dest1 = v->vgrf(glsl_float_type()); fs_reg dest2 = v->vgrf(glsl_float_type()); @@ -3129,91 +3129,3 @@ TEST_F(cmod_propagation_test, prop_across_sel_gfx7) EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod); } -TEST_F(cmod_propagation_test, prop_across_sel_gfx5) -{ - devinfo->ver = 5; - devinfo->verx10 = devinfo->ver * 10; - - fs_reg dest1 = v->vgrf(glsl_float_type()); - fs_reg dest2 = v->vgrf(glsl_float_type()); - fs_reg src0 = v->vgrf(glsl_float_type()); - fs_reg src1 = v->vgrf(glsl_float_type()); - fs_reg src2 = v->vgrf(glsl_float_type()); - fs_reg src3 = v->vgrf(glsl_float_type()); - fs_reg zero(brw_imm_f(0.0f)); - bld.ADD(dest1, src0, src1); - bld.emit_minmax(dest2, src2, src3, BRW_CONDITIONAL_GE); - bld.CMP(bld.null_reg_f(), dest1, zero, BRW_CONDITIONAL_GE); - - /* = Before = - * - * 0: add(8) dest1 src0 src1 - * 1: sel.ge(8) dest2 src2 src3 - * 2: cmp.ge.f0(8) null dest1 0.0f - * - * = After = - * (no changes) - * - * On Gfx4 and Gfx5, sel.l (for min) and sel.ge (for max) are implemented - * using a separate cmpn and sel instruction. This lowering occurs in - * fs_vistor::lower_minmax which is called a long time after the first - * calls to cmod_propagation. - */ - - v->calculate_cfg(); - bblock_t *block0 = v->cfg->blocks[0]; - - EXPECT_EQ(0, block0->start_ip); - EXPECT_EQ(2, block0->end_ip); - - EXPECT_FALSE(cmod_propagation(v)); - EXPECT_EQ(0, block0->start_ip); - EXPECT_EQ(2, block0->end_ip); - EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); - EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod); - EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode); - EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod); - EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode); - EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod); -} - -TEST_F(cmod_propagation_test, prop_into_sel_gfx5) -{ - devinfo->ver = 5; - devinfo->verx10 = devinfo->ver * 10; - - fs_reg dest = v->vgrf(glsl_float_type()); - fs_reg src0 = v->vgrf(glsl_float_type()); - fs_reg src1 = v->vgrf(glsl_float_type()); - fs_reg zero(brw_imm_f(0.0f)); - bld.emit_minmax(dest, src0, src1, BRW_CONDITIONAL_GE); - bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE); - - /* = Before = - * - * 0: sel.ge(8) dest src0 src1 - * 1: cmp.ge.f0(8) null dest 0.0f - * - * = After = - * (no changes) - * - * Do not copy propagate into a sel.cond instruction. While it does modify - * the flags, the flags are not based on the result compared with zero (as - * with most other instructions). The result is based on the sources - * compared with each other (like cmp.cond). - */ - - v->calculate_cfg(); - bblock_t *block0 = v->cfg->blocks[0]; - - EXPECT_EQ(0, block0->start_ip); - EXPECT_EQ(1, block0->end_ip); - - EXPECT_FALSE(cmod_propagation(v)); - EXPECT_EQ(0, block0->start_ip); - EXPECT_EQ(1, block0->end_ip); - EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 0)->opcode); - EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod); - EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode); - EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod); -} diff --git a/src/intel/compiler/test_fs_copy_propagation.cpp b/src/intel/compiler/test_fs_copy_propagation.cpp index 9b56601b404..064c46daded 100644 --- a/src/intel/compiler/test_fs_copy_propagation.cpp +++ b/src/intel/compiler/test_fs_copy_propagation.cpp @@ -74,7 +74,7 @@ copy_propagation_test::copy_propagation_test() bld = fs_builder(v).at_end(); - devinfo->ver = 4; + devinfo->ver = 9; devinfo->verx10 = devinfo->ver * 10; } diff --git a/src/intel/compiler/test_fs_saturate_propagation.cpp b/src/intel/compiler/test_fs_saturate_propagation.cpp index 110653fc58d..a416cefd1c7 100644 --- a/src/intel/compiler/test_fs_saturate_propagation.cpp +++ b/src/intel/compiler/test_fs_saturate_propagation.cpp @@ -74,7 +74,7 @@ saturate_propagation_test::saturate_propagation_test() bld = fs_builder(v).at_end(); - devinfo->ver = 6; + devinfo->ver = 9; devinfo->verx10 = devinfo->ver * 10; }