intel/fs/xe2+: Stop building SIMD8 shaders for geometry stages (VS/TCS/TES/GS).

They are no longer suppored by the fixed-function hardware.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26605>

src/intel/compiler/brw_vec4_tcs.cpp

@@ -447,9 +447,10 @@ brw_compile_tcs(const struct brw_compiler *compiler,
    }
 
    if (is_scalar) {
+      const unsigned dispatch_width = devinfo->ver >= 20 ? 16 : 8;
       fs_visitor v(compiler, &params->base, &key->base,
-                   &prog_data->base.base, nir, 8, params->base.stats != NULL,
-                   debug_enabled);
+                   &prog_data->base.base, nir, dispatch_width,
+                   params->base.stats != NULL, debug_enabled);
       if (!v.run_tcs()) {
          params->base.error_str =
             ralloc_strdup(params->base.mem_ctx, v.fail_msg);