diff --git a/src/amd/vulkan/meta/radv_meta_clear.c b/src/amd/vulkan/meta/radv_meta_clear.c
index 13bc74cbf74..50bfa2210b7 100644
--- a/src/amd/vulkan/meta/radv_meta_clear.c
+++ b/src/amd/vulkan/meta/radv_meta_clear.c
@@ -1253,10 +1253,6 @@ gfx11_get_fast_clear_parameters(struct radv_device *device, const struct radv_im
    unsigned start_bit = UINT_MAX;
    unsigned end_bit = 0;
 
-   /* TODO: 8bpp and 16bpp fast DCC clears don't work. */
-   if (desc->block.bits <= 16)
-      return false;
-
    /* Find the used bit range. */
    for (unsigned i = 0; i < 4; i++) {
       unsigned swizzle = desc->swizzle[i];