From 3c1dbc1d9bcd00ba1e928965eb2b73067850a5c8 Mon Sep 17 00:00:00 2001
From: Rhys Perry <pendingchaos02@gmail.com>
Date: Tue, 1 Apr 2025 12:57:53 +0100
Subject: [PATCH] aco/ra: cleanup compact_relocate_vars fallback path
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We don't need to duplicate these loops.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>
---
 src/amd/compiler/aco_register_allocation.cpp | 22 +++++++-------------
 1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index e8e19efb87a..991a802beaa 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -1889,23 +1889,29 @@ get_reg(ra_ctx& ctx, const RegisterFile& reg_file, Temp temp,
       const PhysRegInterval regs = get_reg_bounds(ctx, info.rc);
 
       unsigned def_size = info.rc.size();
+      std::vector<IDAndRegClass> def_vars;
       for (Definition def : instr->definitions) {
          if (def.isPrecolored()) {
             assert(!regs.contains({def.physReg(), def.size()}));
             continue;
          }
-         if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type())
+         if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type()) {
             def_size += def.regClass().size();
+            def_vars.emplace_back(def.tempId(), def.regClass());
+         }
       }
 
       unsigned killed_op_size = 0;
+      std::vector<IDAndRegClass> killed_op_vars;
       for (Operand op : instr->operands) {
          if (op.isPrecolored()) {
             assert(!regs.contains({op.physReg(), op.size()}));
             continue;
          }
-         if (op.isTemp() && op.isFirstKillBeforeDef() && op.regClass().type() == info.rc.type())
+         if (op.isTemp() && op.isFirstKillBeforeDef() && op.regClass().type() == info.rc.type()) {
             killed_op_size += op.regClass().size();
+            killed_op_vars.emplace_back(op.tempId(), op.regClass());
+         }
       }
 
       /* reallocate passthrough variables and non-killed operands */
@@ -1917,21 +1923,9 @@ get_reg(ra_ctx& ctx, const RegisterFile& reg_file, Temp temp,
       PhysReg space = compact_relocate_vars(ctx, vars, parallelcopies, regs.lo());
 
       /* reallocate killed operands */
-      std::vector<IDAndRegClass> killed_op_vars;
-      for (Operand op : instr->operands) {
-         if (!op.isPrecolored() && op.isFirstKillBeforeDef() &&
-             op.regClass().type() == info.rc.type())
-            killed_op_vars.emplace_back(op.tempId(), op.regClass());
-      }
       compact_relocate_vars(ctx, killed_op_vars, parallelcopies, space);
 
       /* reallocate definitions */
-      std::vector<IDAndRegClass> def_vars;
-      for (Definition def : instr->definitions) {
-         if (!def.isPrecolored() && ctx.assignments[def.tempId()].assigned &&
-             def.regClass().type() == info.rc.type())
-            def_vars.emplace_back(def.tempId(), def.regClass());
-      }
       def_vars.emplace_back(0xffffffff, info.rc);
       return compact_relocate_vars(ctx, def_vars, parallelcopies, space);
    }