diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index e8e19efb87a..991a802beaa 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -1889,23 +1889,29 @@ get_reg(ra_ctx& ctx, const RegisterFile& reg_file, Temp temp, const PhysRegInterval regs = get_reg_bounds(ctx, info.rc); unsigned def_size = info.rc.size(); + std::vector def_vars; for (Definition def : instr->definitions) { if (def.isPrecolored()) { assert(!regs.contains({def.physReg(), def.size()})); continue; } - if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type()) + if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type()) { def_size += def.regClass().size(); + def_vars.emplace_back(def.tempId(), def.regClass()); + } } unsigned killed_op_size = 0; + std::vector killed_op_vars; for (Operand op : instr->operands) { if (op.isPrecolored()) { assert(!regs.contains({op.physReg(), op.size()})); continue; } - if (op.isTemp() && op.isFirstKillBeforeDef() && op.regClass().type() == info.rc.type()) + if (op.isTemp() && op.isFirstKillBeforeDef() && op.regClass().type() == info.rc.type()) { killed_op_size += op.regClass().size(); + killed_op_vars.emplace_back(op.tempId(), op.regClass()); + } } /* reallocate passthrough variables and non-killed operands */ @@ -1917,21 +1923,9 @@ get_reg(ra_ctx& ctx, const RegisterFile& reg_file, Temp temp, PhysReg space = compact_relocate_vars(ctx, vars, parallelcopies, regs.lo()); /* reallocate killed operands */ - std::vector killed_op_vars; - for (Operand op : instr->operands) { - if (!op.isPrecolored() && op.isFirstKillBeforeDef() && - op.regClass().type() == info.rc.type()) - killed_op_vars.emplace_back(op.tempId(), op.regClass()); - } compact_relocate_vars(ctx, killed_op_vars, parallelcopies, space); /* reallocate definitions */ - std::vector def_vars; - for (Definition def : instr->definitions) { - if (!def.isPrecolored() && ctx.assignments[def.tempId()].assigned && - def.regClass().type() == info.rc.type()) - def_vars.emplace_back(def.tempId(), def.regClass()); - } def_vars.emplace_back(0xffffffff, info.rc); return compact_relocate_vars(ctx, def_vars, parallelcopies, space); }