From 3bc31c307faf68b6fa1b065879c4a92355281d8e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 10 Jul 2025 11:01:30 -0400 Subject: [PATCH] ac/nir: fix indexing GS inputs with non-constant vertex index on gfx9-11 This hasn't been reproducible because RADV and GLSL always lower non-constant slot and vertex indexing of GS inputs, but we'll stop lowering it. Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c b/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c index a89d1d63509..1244889f4c6 100644 --- a/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c +++ b/src/amd/common/nir/ac_nir_lower_esgs_io_to_mem.c @@ -242,9 +242,9 @@ gs_per_vertex_input_vertex_offset_gfx9(nir_builder *b, lower_esgs_io_state *st, for (unsigned i = 1; i < b->shader->info.gs.vertices_in; i++) { nir_def *cond = nir_ieq_imm(b, vertex_src->ssa, i); - nir_def *elem = gs_get_vertex_offset(b, st, i / 2u * 2u); + nir_def *elem = gs_get_vertex_offset(b, st, i / 2u); if (i % 2u) - elem = nir_ishr_imm(b, elem, 16u); + elem = nir_ushr_imm(b, elem, 16u); vertex_offset = nir_bcsel(b, cond, elem, vertex_offset); }