diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index ab61d5515f2..06a887bc1c1 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -1547,7 +1547,7 @@ void register_allocation(Program *program, std::vector> live_out_ instr->definitions[0].setFixed(instr->operands[3].physReg()); } else if (instr->format == Format::MIMG && instr->definitions.size() == 1 && - instr->operands[1].regClass() == instr->definitions[0].regClass()) { + instr->operands[1].regClass().type() == RegType::vgpr) { instr->definitions[0].setFixed(instr->operands[1].physReg()); } diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp index 293ec32a330..a479083a54c 100644 --- a/src/amd/compiler/aco_validate.cpp +++ b/src/amd/compiler/aco_validate.cpp @@ -244,7 +244,8 @@ void validate(Program* program, FILE * output) if (instr->operands[1].hasRegClass() && instr->operands[1].regClass().type() == RegType::sgpr) check(instr->operands[1].regClass() == s4, "MIMG operands[1] (sampler constant) must be 4 SGPRs", instr.get()); else if (instr->operands[1].hasRegClass() && instr->operands[1].regClass().type() == RegType::vgpr) - check(instr->definitions.empty() || instr->definitions[0].regClass() == instr->operands[1].regClass(), + check((instr->definitions.empty() || instr->definitions[0].regClass() == instr->operands[1].regClass() || + instr->opcode == aco_opcode::image_atomic_cmpswap || instr->opcode == aco_opcode::image_atomic_fcmpswap), "MIMG operands[1] (VDATA) must be the same as definitions[0] for atomics", instr.get()); check(instr->operands[2].hasRegClass() && instr->operands[2].regClass().type() == RegType::vgpr, "MIMG operands[2] (VADDR) must be VGPR", instr.get());