diff --git a/src/amd/compiler/aco_shader_info.h b/src/amd/compiler/aco_shader_info.h index 8d055835070..576b787d035 100644 --- a/src/amd/compiler/aco_shader_info.h +++ b/src/amd/compiler/aco_shader_info.h @@ -80,14 +80,11 @@ struct aco_ps_epilog_info { struct aco_shader_info { enum ac_hw_stage hw_stage; uint8_t wave_size; - bool is_ngg; bool has_ngg_culling; bool has_ngg_early_prim_export; bool image_2d_view_of_3d; unsigned workgroup_size; struct { - bool as_es; - bool as_ls; bool tcs_in_out_eq; uint64_t tcs_temp_only_input_mask; bool has_prolog; @@ -96,9 +93,6 @@ struct aco_shader_info { uint32_t num_lds_blocks; unsigned tess_input_vertices; } tcs; - struct { - bool as_es; - } tes; struct { bool has_epilog; struct ac_arg epilog_pc; diff --git a/src/amd/vulkan/radv_aco_shader_info.h b/src/amd/vulkan/radv_aco_shader_info.h index 7f96e764703..eb72ec97e28 100644 --- a/src/amd/vulkan/radv_aco_shader_info.h +++ b/src/amd/vulkan/radv_aco_shader_info.h @@ -90,17 +90,13 @@ radv_aco_convert_shader_info(struct aco_shader_info *aco_info, const struct radv const enum amd_gfx_level gfx_level) { ASSIGN_FIELD(wave_size); - ASSIGN_FIELD(is_ngg); ASSIGN_FIELD(has_ngg_culling); ASSIGN_FIELD(has_ngg_early_prim_export); ASSIGN_FIELD(workgroup_size); - ASSIGN_FIELD(vs.as_es); - ASSIGN_FIELD(vs.as_ls); ASSIGN_FIELD(vs.tcs_in_out_eq); ASSIGN_FIELD(vs.tcs_temp_only_input_mask); ASSIGN_FIELD(vs.has_prolog); ASSIGN_FIELD(tcs.num_lds_blocks); - ASSIGN_FIELD(tes.as_es); ASSIGN_FIELD(ps.has_epilog); ASSIGN_FIELD(ps.num_interp); ASSIGN_FIELD(ps.spi_ps_input); diff --git a/src/gallium/drivers/radeonsi/si_shader_aco.c b/src/gallium/drivers/radeonsi/si_shader_aco.c index 59eca100c06..9ec2646cfec 100644 --- a/src/gallium/drivers/radeonsi/si_shader_aco.c +++ b/src/gallium/drivers/radeonsi/si_shader_aco.c @@ -107,19 +107,11 @@ si_fill_aco_shader_info(struct si_shader *shader, struct aco_shader_info *info) info->hw_stage = si_select_hw_stage(stage, key, gfx_level); if (stage <= MESA_SHADER_GEOMETRY && key->ge.as_ngg && !key->ge.as_es) { - info->is_ngg = true; info->has_ngg_culling = key->ge.opt.ngg_culling; info->has_ngg_early_prim_export = gfx10_ngg_export_prim_early(shader); } switch (stage) { - case MESA_SHADER_VERTEX: - info->vs.as_es = key->ge.as_es; - info->vs.as_ls = key->ge.as_ls; - break; - case MESA_SHADER_TESS_EVAL: - info->tes.as_es = key->ge.as_es; - break; case MESA_SHADER_FRAGMENT: info->ps.num_interp = si_get_ps_num_interp(shader); info->ps.spi_ps_input = shader->config.spi_ps_input_ena;