pan/midg: Fix swizzling on 8-bit sources

Even though 8-bit ALUs are not supported, we can have [un]pack_32_4x8
instructions which translate to IMOVs, and those operate on 8-bit
vectors. The problem is, the swizzling granularity is 16 bit, which
means we don't support

      MOV.i8 R0.xyzw, TMP0.xxxx, R1.zyxw

and the compiler doesn't even complain, it just applies 8 bit
swizzling directly, which obviously doesn't work.

This is probably not the right way to fix that, but I thought I'd
raised the issue with a hack to fix, so we can get the discussion
started.

(Found while debugging FB store lowering on Midgard).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14885>

src/panfrost/ci/panfrost-t860-fails.txt

@@ -90,5 +90,3 @@ dEQP-GLES31.functional.texture.multisample.samples_3.use_texture_uint_2d,Fail
 dEQP-GLES31.functional.texture.multisample.samples_3.use_texture_uint_2d_array,Fail
 dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_int_2d,Fail
 dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_int_2d_array,Fail
-dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_uint_2d,Fail
-dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_uint_2d_array,Fail

src/panfrost/midgard/midgard_emit.c

@@ -333,6 +333,12 @@ mir_pack_vector_srcs(midgard_instruction *ins, midgard_vector_alu *alu)
                 unsigned sz = nir_alu_type_get_type_size(ins->src_types[i]);
                 assert((sz == base_size) || (sz == base_size / 2));
 
+                /* Promote 8bit moves to 16bit ones so we can support any swizzles. */
+                if (sz == 8 && base_size == 8 && ins->op == midgard_alu_op_imov) {
+                        ins->outmod = midgard_outmod_keeplo;
+                        base_size = 16;
+                }
+
                 midgard_src_expand_mode expand_mode = midgard_src_passthrough;
                 unsigned swizzle = mir_pack_swizzle(ins->mask, ins->swizzle[i],
                                                     sz, base_size, channeled,

src/panfrost/midgard/mir.c

@@ -240,6 +240,12 @@ mir_upper_override(midgard_instruction *ins, unsigned inst_size)
 {
         unsigned type_size = nir_alu_type_get_type_size(ins->dest_type);
 
+        /* 8bit imovs are promoted to 16bit ones with .sext on the source and
+         * .keeplo on the destination to accomodate with non-identity swizzles.
+         */
+        if (ins->op == midgard_alu_op_imov && type_size == 8)
+                return 0;
+
         /* If the sizes are the same, there's nothing to override */
         if (type_size == inst_size)
                 return -1;