diff --git a/docs/features.txt b/docs/features.txt index 663bde7a72c..40a2b9ef0e0 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -557,6 +557,7 @@ Khronos extensions that are not part of any Vulkan version: VK_KHR_maintenance7 DONE (anv, hk, lvp, nvk, panvk/v10+, radv, tu, vn) VK_KHR_maintenance8 DONE (anv, hk, lvp, nvk, panvk/v10+, radv, tu) VK_KHR_maintenance9 DONE (anv, hk, lvp, nvk, panvk, radv) + VK_KHR_maintenance10 DONE (anv) VK_KHR_performance_query DONE (anv, radv/gfx10.3+, tu, v3dv) VK_KHR_pipeline_binary DONE (radv) VK_KHR_pipeline_executable_properties DONE (anv, hk, nvk, panvk, hasvk, radv, tu, v3dv) diff --git a/docs/relnotes/new_features.txt b/docs/relnotes/new_features.txt index 8b214117f10..54314f95b3e 100644 --- a/docs/relnotes/new_features.txt +++ b/docs/relnotes/new_features.txt @@ -6,3 +6,4 @@ VK_KHR_present_id on HoneyKrisp VK_KHR_present_id2 on HoneyKrisp VK_KHR_present_wait on HoneyKrisp VK_KHR_present_wait2 on HoneyKrisp +VK_KHR_maintenance10 on ANV diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index a469cb98153..0b186bd4354 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -2425,6 +2425,11 @@ anv_attachment_msaa_resolve(struct anv_cmd_buffer *cmd_buffer, dst_format = dst_iview->planes[0].isl.format; } + if (att->skip_srgb_decode) { + src_format = isl_format_srgb_to_linear(src_format); + dst_format = isl_format_srgb_to_linear(dst_format); + } + const VkRect2D render_area = gfx->render_area; if (gfx->view_mask == 0) { anv_image_msaa_resolve(cmd_buffer, @@ -2468,7 +2473,8 @@ resolve_image(struct anv_cmd_buffer *cmd_buffer, VkImageLayout src_image_layout, struct anv_image *dst_image, VkImageLayout dst_image_layout, - const VkImageResolve2 *region) + const VkImageResolve2 *region, + const VkResolveImageModeInfoKHR *res_info) { assert(region->srcSubresource.aspectMask == region->dstSubresource.aspectMask); assert(vk_image_subresource_layer_count(&src_image->vk, ®ion->srcSubresource) == @@ -2476,37 +2482,57 @@ resolve_image(struct anv_cmd_buffer *cmd_buffer, const uint32_t layer_count = vk_image_subresource_layer_count(&dst_image->vk, ®ion->dstSubresource); + const bool skip_srgb_decode = + res_info ? + (res_info->flags & VK_RESOLVE_IMAGE_SKIP_TRANSFER_FUNCTION_BIT_KHR) : + false; anv_foreach_image_aspect_bit(aspect_bit, src_image, region->srcSubresource.aspectMask) { + const VkImageAspectFlags aspect = (1 << aspect_bit); + const uint32_t plane = anv_image_aspect_to_plane(src_image, aspect); + enum isl_aux_usage src_aux_usage = anv_layout_to_aux_usage(cmd_buffer->device->info, src_image, - (1 << aspect_bit), + aspect, VK_IMAGE_USAGE_TRANSFER_SRC_BIT, src_image_layout, cmd_buffer->queue_family->queueFlags); enum isl_aux_usage dst_aux_usage = anv_layout_to_aux_usage(cmd_buffer->device->info, dst_image, - (1 << aspect_bit), + aspect, VK_IMAGE_USAGE_TRANSFER_DST_BIT, dst_image_layout, cmd_buffer->queue_family->queueFlags); + const enum blorp_filter filter = res_info ? + (aspect & VK_IMAGE_ASPECT_STENCIL_BIT) ? + vk_to_blorp_resolve_mode(res_info->stencilResolveMode) : + vk_to_blorp_resolve_mode(res_info->resolveMode) : + BLORP_FILTER_NONE; + + enum isl_format src_format = src_image->planes[plane].primary_surface.isl.format; + enum isl_format dst_format = dst_image->planes[plane].primary_surface.isl.format; + if (skip_srgb_decode) { + src_format = isl_format_srgb_to_linear(src_format); + dst_format = isl_format_srgb_to_linear(dst_format); + } + anv_image_msaa_resolve(cmd_buffer, - src_image, ISL_FORMAT_UNSUPPORTED, src_aux_usage, + src_image, src_format, src_aux_usage, region->srcSubresource.mipLevel, region->srcSubresource.baseArrayLayer, - dst_image, ISL_FORMAT_UNSUPPORTED, dst_aux_usage, + dst_image, dst_format, dst_aux_usage, region->dstSubresource.mipLevel, region->dstSubresource.baseArrayLayer, - (1 << aspect_bit), + aspect, region->srcOffset.x, region->srcOffset.y, region->dstOffset.x, region->dstOffset.y, region->extent.width, region->extent.height, - layer_count, BLORP_FILTER_NONE); + layer_count, filter); } } @@ -2518,11 +2544,16 @@ void anv_CmdResolveImage2( ANV_FROM_HANDLE(anv_image, src_image, pResolveImageInfo->srcImage); ANV_FROM_HANDLE(anv_image, dst_image, pResolveImageInfo->dstImage); + const VkResolveImageModeInfoKHR *res_info = + vk_find_struct_const(pResolveImageInfo->pNext, + RESOLVE_IMAGE_MODE_INFO_KHR); + for (uint32_t r = 0; r < pResolveImageInfo->regionCount; r++) { resolve_image(cmd_buffer, src_image, pResolveImageInfo->srcImageLayout, dst_image, pResolveImageInfo->dstImageLayout, - &pResolveImageInfo->pRegions[r]); + &pResolveImageInfo->pRegions[r], + res_info); } } diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c index e3efabb965f..722918ce55e 100644 --- a/src/intel/vulkan/anv_formats.c +++ b/src/intel/vulkan/anv_formats.c @@ -699,6 +699,20 @@ anv_get_image_format_features2(const struct anv_physical_device *physical_device VK_FORMAT_FEATURE_2_SAMPLED_IMAGE_DEPTH_COMPARISON_BIT; } + /* Notes on VK_KHR_maintenance10: + * + * Intel HW can only write depth HiZ surfaces from the 3D pipeline depth + * output. So Depth on compute or transfer queues is not possible. Here + * we choose to not support stencil either, although it could be + * possible on Gfx20+ but would probably be confusing to application. So + * no support for: + * - VK_FORMAT_FEATURE_2_DEPTH_COPY_ON_COMPUTE_QUEUE_BIT_KHR + * - VK_FORMAT_FEATURE_2_DEPTH_COPY_ON_TRANSFER_QUEUE_BIT_KHR + * - VK_FORMAT_FEATURE_2_STENCIL_COPY_ON_COMPUTE_QUEUE_BIT_KHR + * - VK_FORMAT_FEATURE_2_STENCIL_COPY_ON_TRANSFER_QUEUE_BIT_KHR + */ + + return flags; } diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c index 4342497b23b..9846f0c54a3 100644 --- a/src/intel/vulkan/anv_image.c +++ b/src/intel/vulkan/anv_image.c @@ -1949,6 +1949,10 @@ anv_image_init(struct anv_device *device, struct anv_image *image, image->vk.tiling).isl_format; add_image_view_format(image, image_format); + if (isl_format_is_srgb(image_format) && + device->vk.enabled_features.maintenance10) + add_image_view_format(image, isl_format_srgb_to_linear(image_format)); + if (image->vk.usage & (VK_IMAGE_USAGE_TRANSFER_DST_BIT | VK_IMAGE_USAGE_TRANSFER_SRC_BIT)) { if (vk_format_is_color(image->vk.format)) { diff --git a/src/intel/vulkan/anv_physical_device.c b/src/intel/vulkan/anv_physical_device.c index 7f0b3c6f30e..c2d16511a6d 100644 --- a/src/intel/vulkan/anv_physical_device.c +++ b/src/intel/vulkan/anv_physical_device.c @@ -199,6 +199,7 @@ get_device_extensions(const struct anv_physical_device *device, .KHR_maintenance7 = true, .KHR_maintenance8 = true, .KHR_maintenance9 = true, + .KHR_maintenance10 = true, .KHR_map_memory2 = true, .KHR_multiview = true, .KHR_performance_query = @@ -992,6 +993,9 @@ get_features(const struct anv_physical_device *pdevice, /* VK_EXT_shader_uniform_buffer_unsized_array */ .shaderUniformBufferUnsizedArray = true, + + /* VK_KHR_maintenance10 */ + .maintenance10 = true, }; /* The new DOOM and Wolfenstein games require depthBounds without @@ -1547,6 +1551,13 @@ get_properties(const struct anv_physical_device *pdevice, VK_DEFAULT_VERTEX_ATTRIBUTE_VALUE_ZERO_ZERO_ZERO_ZERO_KHR; } + /* VK_KHR_maintenance10 */ + { + props->rgba4OpaqueBlackSwizzled = true; + props->resolveSrgbFormatAppliesTransferFunction = true; + props->resolveSrgbFormatSupportsTransferFunctionControl = true; + } + /* VK_KHR_performance_query */ { props->allowCommandBufferQueryCopies = false; diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 68b85842f34..6eaa1e8ac38 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -4221,6 +4221,8 @@ struct anv_attachment { VkResolveModeFlagBits resolve_mode; const struct anv_image_view *resolve_iview; VkImageLayout resolve_layout; + + bool skip_srgb_decode; }; /** State tracking for vertex buffer flushes diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 0b0763836d5..339b57a9e7b 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -5417,6 +5417,7 @@ void genX(CmdBeginRendering)( gfx->color_att[i].iview = NULL; gfx->color_att[i].layout = VK_IMAGE_LAYOUT_UNDEFINED; gfx->color_att[i].aux_usage = ISL_AUX_USAGE_NONE; + gfx->color_att[i].skip_srgb_decode = false; continue; } @@ -5425,6 +5426,9 @@ void genX(CmdBeginRendering)( ANV_FROM_HANDLE(anv_image_view, iview, att->imageView); const VkImageLayout initial_layout = attachment_initial_layout(att); + const VkRenderingAttachmentFlagsInfoKHR *att_flags_info = + vk_find_struct_const(att->pNext, RENDERING_ATTACHMENT_FLAGS_INFO_KHR); + assert(render_area.offset.x + render_area.extent.width <= iview->vk.extent.width); assert(render_area.offset.y + render_area.extent.height <= @@ -5451,6 +5455,9 @@ void genX(CmdBeginRendering)( gfx->color_att[i].iview = iview; gfx->color_att[i].layout = att->imageLayout; gfx->color_att[i].aux_usage = aux_usage; + gfx->color_att[i].skip_srgb_decode = att_flags_info && + (att_flags_info->flags & + VK_RENDERING_ATTACHMENT_RESOLVE_SKIP_TRANSFER_FUNCTION_BIT_KHR); union isl_color_value fast_clear_color = { .u32 = { 0, } }; @@ -5908,8 +5915,9 @@ cmd_buffer_mark_attachment_written(struct anv_cmd_buffer *cmd_buffer, #endif } -void genX(CmdEndRendering)( - VkCommandBuffer commandBuffer) +void genX(CmdEndRendering2KHR)( + VkCommandBuffer commandBuffer, + const VkRenderingEndInfoKHR* pRenderingEndInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); struct anv_cmd_graphics_state *gfx = &cmd_buffer->state.gfx;