From 38a94c82e6ac3ae3e76e01ff4994ae4c46c487ec Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Fri, 29 Oct 2021 14:16:44 -0700 Subject: [PATCH] intel/fs: Don't optimize out 1.0*x and -1.0*x MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This (sort of) matches the behavior of nir_opt_algebraic. This ensures that subnormal values are properly flushed to zero. With the aid of "nir/search: Float sources of texture instructions are float users" and "nir/search: Transitively apply is_only_used_as_float", there would have been no shader-db regressions on Intel platforms. However, those caused a significant increase in compile time. Since the instruction regressions were so small, I just dropped those commits rather than improve them. All Haswell and newer platforms had similar results. (Ice Lake shown) total instructions in shared programs: 20125042 -> 20125094 (<.01%) instructions in affected programs: 7184 -> 7236 (0.72%) helped: 0 HURT: 32 HURT stats (abs) min: 1 max: 4 x̄: 1.62 x̃: 2 HURT stats (rel) min: 0.11% max: 1.49% x̄: 0.85% x̃: 0.78% 95% mean confidence interval for instructions value: 1.39 1.86 95% mean confidence interval for instructions %-change: 0.74% 0.96% Instructions are HURT. total cycles in shared programs: 862745586 -> 862746551 (<.01%) cycles in affected programs: 109872 -> 110837 (0.88%) helped: 12 HURT: 23 helped stats (abs) min: 2 max: 774 x̄: 90.83 x̃: 19 helped stats (rel) min: 0.07% max: 25.23% x̄: 3.06% x̃: 0.40% HURT stats (abs) min: 2 max: 1106 x̄: 89.35 x̃: 12 HURT stats (rel) min: 0.08% max: 45.40% x̄: 3.01% x̃: 0.47% 95% mean confidence interval for cycles value: -60.09 115.23 95% mean confidence interval for cycles %-change: -2.21% 4.07% Inconclusive result (value mean confidence interval includes 0). All of the shaders hurt are in either UE4 shooter-game or shooter_demo. Tiger Lake Instructions in all programs: 159893213 -> 159893290 (+0.0%) SENDs in all programs: 6936431 -> 6936431 (+0.0%) Loops in all programs: 38385 -> 38385 (+0.0%) Cycles in all programs: 7019259514 -> 7019260087 (+0.0%) Spills in all programs: 101389 -> 101389 (+0.0%) Fills in all programs: 131532 -> 131532 (+0.0%) Ice Lake Instructions in all programs: 143624164 -> 143624235 (+0.0%) SENDs in all programs: 6980289 -> 6980289 (+0.0%) Loops in all programs: 38383 -> 38383 (+0.0%) Cycles in all programs: 8440082767 -> 8440083238 (+0.0%) Spills in all programs: 102246 -> 102246 (+0.0%) Fills in all programs: 131908 -> 131908 (+0.0%) Skylake Instructions in all programs: 134185424 -> 134185495 (+0.0%) SENDs in all programs: 6938790 -> 6938790 (+0.0%) Loops in all programs: 38356 -> 38356 (+0.0%) Cycles in all programs: 8222366529 -> 8222366923 (+0.0%) Spills in all programs: 98821 -> 98821 (+0.0%) Fills in all programs: 125218 -> 125218 (+0.0%) Reviewed-by: Caio Oliveira Fixes: f5dd6dfe012 ("anv: enable VK_KHR_shader_float_controls and SPV_KHR_float_controls") Part-of: --- src/intel/compiler/brw_fs.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 106f4e28c6e..10239f21f85 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -2572,6 +2572,9 @@ fs_visitor::opt_algebraic() if (inst->src[1].file != IMM) continue; + if (brw_reg_type_is_floating_point(inst->src[1].type)) + break; + /* a * 1.0 = a */ if (inst->src[1].is_one()) { inst->opcode = BRW_OPCODE_MOV;