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anv: Drop unused helper cmd_buffer_dispatch_kernel

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Drop some more unused fields: (Lionel)
- kernel_args_size, kernel_arg_count & kernel_args
- anv_kernel_arg
- anv_kernel
- max_grl_scratch_size

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35530>
This commit is contained in:
Sagar Ghuge
2025-06-13 22:13:48 -07:00
committed by Marge Bot
parent 8ed19a407f
commit 3696f85b63
4 changed files with 0 additions and 152 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/vulkan/anv_genX.h
-6
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@@ -246,12 +246,6 @@ void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
struct anv_address dst, struct anv_address src,
uint32_t size);
void genX(cmd_buffer_dispatch_kernel)(struct anv_cmd_buffer *cmd_buffer,
struct anv_kernel *kernel,
const uint32_t *global_size, /* NULL for indirect */
uint32_t arg_count,
const struct anv_kernel_arg *args);
void genX(blorp_init_dynamic_states)(struct blorp_context *context);
void genX(blorp_exec)(struct blorp_batch *batch,
src/intel/vulkan/anv_pipeline_cache.c
-22
View File
@@ -235,8 +235,6 @@ anv_shader_bin_create(struct anv_device *device,
VK_MULTIALLOC_DECL(&ma, struct anv_pipeline_embedded_sampler_binding,
embedded_sampler_to_binding,
bind_map->embedded_sampler_count);
VK_MULTIALLOC_DECL(&ma, struct brw_kernel_arg_desc, kernel_args,
bind_map->kernel_arg_count);
VK_MULTIALLOC_DECL(&ma, struct anv_embedded_sampler *, embedded_samplers,
bind_map->embedded_sampler_count);
@@ -386,10 +384,6 @@ anv_shader_bin_create(struct anv_device *device,
bind_map->input_attachments,
ARRAY_SIZE(bind_map->input_attachments));
typed_memcpy(kernel_args, bind_map->kernel_args,
bind_map->kernel_arg_count);
shader->bind_map.kernel_args = kernel_args;
return shader;
}
@@ -444,11 +438,6 @@ anv_shader_bin_serialize(struct vk_pipeline_cache_object *object,
blob_write_uint32(blob, shader->bind_map.surface_count);
blob_write_uint32(blob, shader->bind_map.sampler_count);
blob_write_uint32(blob, shader->bind_map.embedded_sampler_count);
if (shader->stage == MESA_SHADER_KERNEL) {
uint32_t packed = (uint32_t)shader->bind_map.kernel_args_size << 16 |
(uint32_t)shader->bind_map.kernel_arg_count;
blob_write_uint32(blob, packed);
}
blob_write_bytes(blob, shader->bind_map.surface_to_descriptor,
shader->bind_map.surface_count *
sizeof(*shader->bind_map.surface_to_descriptor));
@@ -460,9 +449,6 @@ anv_shader_bin_serialize(struct vk_pipeline_cache_object *object,
sizeof(*shader->bind_map.embedded_sampler_to_binding));
blob_write_bytes(blob, shader->bind_map.input_attachments,
sizeof(shader->bind_map.input_attachments));
blob_write_bytes(blob, shader->bind_map.kernel_args,
shader->bind_map.kernel_arg_count *
sizeof(*shader->bind_map.kernel_args));
blob_write_bytes(blob, shader->bind_map.push_ranges,
sizeof(shader->bind_map.push_ranges));
@@ -516,11 +502,6 @@ anv_shader_bin_deserialize(struct vk_pipeline_cache *cache,
bind_map.surface_count = blob_read_uint32(blob);
bind_map.sampler_count = blob_read_uint32(blob);
bind_map.embedded_sampler_count = blob_read_uint32(blob);
if (stage == MESA_SHADER_KERNEL) {
uint32_t packed = blob_read_uint32(blob);
bind_map.kernel_args_size = (uint16_t)(packed >> 16);
bind_map.kernel_arg_count = (uint16_t)packed;
}
bind_map.surface_to_descriptor = (void *)
blob_read_bytes(blob, bind_map.surface_count *
sizeof(*bind_map.surface_to_descriptor));
@@ -532,9 +513,6 @@ anv_shader_bin_deserialize(struct vk_pipeline_cache *cache,
sizeof(*bind_map.embedded_sampler_to_binding));
blob_copy_bytes(blob, bind_map.input_attachments,
sizeof(bind_map.input_attachments));
bind_map.kernel_args = (void *)
blob_read_bytes(blob, bind_map.kernel_arg_count *
sizeof(*bind_map.kernel_args));
blob_copy_bytes(blob, bind_map.push_ranges, sizeof(bind_map.push_ranges));
if (blob->overrun) {
src/intel/vulkan/anv_private.h
-25
View File
@@ -52,7 +52,6 @@
#include "dev/intel_device_info.h"
#include "blorp/blorp.h"
#include "compiler/brw_compiler.h"
#include "compiler/brw_kernel.h"
#include "compiler/brw_rt.h"
#include "ds/intel_driver_ds.h"
#include "util/bitset.h"
@@ -1278,9 +1277,6 @@ struct anv_physical_device {
uint8_t device_uuid[VK_UUID_SIZE];
uint8_t rt_uuid[VK_UUID_SIZE];
/* Maximum amount of scratch space used by all the GRL kernels */
uint32_t max_grl_scratch_size;
struct vk_sync_type sync_syncobj_type;
struct vk_sync_timeline_type sync_timeline_type;
const struct vk_sync_type * sync_types[4];
@@ -4768,14 +4764,11 @@ struct anv_pipeline_bind_map {
uint32_t surface_count;
uint32_t sampler_count;
uint32_t embedded_sampler_count;
uint16_t kernel_args_size;
uint16_t kernel_arg_count;
struct anv_pipeline_binding * surface_to_descriptor;
struct anv_pipeline_binding * sampler_to_descriptor;
struct anv_pipeline_embedded_sampler_binding* embedded_sampler_to_binding;
BITSET_DECLARE(input_attachments, MAX_DESCRIPTOR_SET_INPUT_ATTACHMENTS + 1);
struct brw_kernel_arg_desc * kernel_args;
struct anv_push_range push_ranges[4];
};
@@ -5293,24 +5286,6 @@ anv_device_init_rt_shaders(struct anv_device *device);
void
anv_device_finish_rt_shaders(struct anv_device *device);
struct anv_kernel_arg {
bool is_ptr;
uint16_t size;
union {
uint64_t u64;
void *ptr;
};
};
struct anv_kernel {
#ifndef NDEBUG
const char *name;
#endif
struct anv_shader_bin *bin;
const struct intel_l3_config *l3_config;
};
struct anv_format_plane {
/* Main format */
enum isl_format isl_format:16;
src/intel/vulkan/genX_cmd_compute.c
-99
View File
@@ -869,105 +869,6 @@ genX(cmd_buffer_ray_query_globals)(struct anv_cmd_buffer *cmd_buffer)
}
#if GFX_VERx10 >= 125
void
genX(cmd_buffer_dispatch_kernel)(struct anv_cmd_buffer *cmd_buffer,
struct anv_kernel *kernel,
const uint32_t *global_size,
uint32_t arg_count,
const struct anv_kernel_arg *args)
{
const struct intel_device_info *devinfo = cmd_buffer->device->info;
const struct brw_cs_prog_data *cs_prog_data =
brw_cs_prog_data_const(kernel->bin->prog_data);
genX(cmd_buffer_config_l3)(cmd_buffer, kernel->l3_config);
genX(cmd_buffer_update_color_aux_op(cmd_buffer, ISL_AUX_OP_NONE));
genX(flush_pipeline_select_gpgpu)(cmd_buffer);
/* Apply any pending pipeline flushes we may have. We want to apply them
* now because, if any of those flushes are for things like push constants,
* the GPU will read the state at weird times.
*/
genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
uint32_t indirect_data_size = sizeof(struct brw_kernel_sysvals);
indirect_data_size += kernel->bin->bind_map.kernel_args_size;
indirect_data_size = ALIGN(indirect_data_size, 64);
struct anv_state indirect_data =
anv_cmd_buffer_alloc_general_state(cmd_buffer,
indirect_data_size, 64);
memset(indirect_data.map, 0, indirect_data.alloc_size);
struct brw_kernel_sysvals sysvals = {};
if (global_size != NULL) {
for (unsigned i = 0; i < 3; i++)
sysvals.num_work_groups[i] = global_size[i];
memcpy(indirect_data.map, &sysvals, sizeof(sysvals));
} else {
struct anv_address sysvals_addr = {
.bo = NULL, /* General state buffer is always 0. */
.offset = indirect_data.offset,
};
compute_store_indirect_params(cmd_buffer, sysvals_addr);
}
void *args_map = indirect_data.map + sizeof(sysvals);
for (unsigned i = 0; i < kernel->bin->bind_map.kernel_arg_count; i++) {
struct brw_kernel_arg_desc *arg_desc =
&kernel->bin->bind_map.kernel_args[i];
assert(i < arg_count);
const struct anv_kernel_arg *arg = &args[i];
if (arg->is_ptr) {
memcpy(args_map + arg_desc->offset, arg->ptr, arg_desc->size);
} else {
assert(arg_desc->size <= sizeof(arg->u64));
memcpy(args_map + arg_desc->offset, &arg->u64, arg_desc->size);
}
}
struct intel_cs_dispatch_info dispatch =
brw_cs_get_dispatch_info(devinfo, cs_prog_data, NULL);
struct GENX(COMPUTE_WALKER_BODY) body = {
.SIMDSize = dispatch.simd_size / 16,
.MessageSIMD = dispatch.simd_size / 16,
.IndirectDataStartAddress = indirect_data.offset,
.IndirectDataLength = indirect_data.alloc_size,
.LocalXMaximum = cs_prog_data->local_size[0] - 1,
.LocalYMaximum = cs_prog_data->local_size[1] - 1,
.LocalZMaximum = cs_prog_data->local_size[2] - 1,
.ExecutionMask = dispatch.right_mask,
.PostSync.MOCS = cmd_buffer->device->isl_dev.mocs.internal,
.InterfaceDescriptor =
get_interface_descriptor_data(cmd_buffer,
kernel->bin,
cs_prog_data,
&dispatch),
};
if (global_size != NULL) {
body.ThreadGroupIDXDimension = global_size[0];
body.ThreadGroupIDYDimension = global_size[1];
body.ThreadGroupIDZDimension = global_size[2];
}
cmd_buffer->state.last_compute_walker =
anv_batch_emitn(
&cmd_buffer->batch,
GENX(COMPUTE_WALKER_length),
GENX(COMPUTE_WALKER),
.IndirectParameterEnable = global_size == NULL,
.PredicateEnable = false,
.body = body,
);
/* We just blew away the compute pipeline state */
cmd_buffer->state.compute.pipeline_dirty = true;
}
static void
calc_local_trace_size(uint8_t local_shift[3], const uint32_t global[3])
{