diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc index bd639bd4042..83b2c271d20 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc @@ -976,6 +976,9 @@ fd6_mem_to_mem(struct fd_ringbuffer *ring, struct pipe_resource *dst, struct fd_bo *dst_bo = fd_resource(dst)->bo; unsigned i; + fd_ringbuffer_attach_bo(ring, dst_bo); + fd_ringbuffer_attach_bo(ring, src_bo); + for (i = 0; i < sizedwords; i++) { OUT_PKT7(ring, CP_MEM_TO_MEM, 5); OUT_RING(ring, 0x00000000); @@ -985,8 +988,6 @@ fd6_mem_to_mem(struct fd_ringbuffer *ring, struct pipe_resource *dst, dst_off += 4; src_off += 4; } - fd_ringbuffer_attach_bo(ring, dst_bo); - fd_ringbuffer_attach_bo(ring, src_bo); } void diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc index e6a7463f4e7..3ab87635ef9 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc @@ -126,6 +126,9 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, assert((offset + slice->size0) <= fd_bo_size(rsc->bo)); + /* Batch with no draws? */ + fd_ringbuffer_attach_bo(ring, rsc->bo); + OUT_REG( ring, RB_MRT_BUF_INFO(CHIP, i, .color_format = format, @@ -170,6 +173,12 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf, uint32_t offset = fd_resource_offset(rsc, zsbuf->u.tex.level, zsbuf->u.tex.first_layer); + /* We could have a depth buffer, but no draws with depth write/test + * enabled, in which case it wouldn't have been part of the batch + * resource tracking + */ + fd_ringbuffer_attach_bo(ring, rsc->bo); + OUT_REG( ring, RB_DEPTH_BUFFER_INFO(CHIP, .depth_format = fmt), A6XX_RB_DEPTH_BUFFER_PITCH(stride), @@ -196,6 +205,8 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf, uint32_t offset = fd_resource_offset(rsc->stencil, zsbuf->u.tex.level, zsbuf->u.tex.first_layer); + fd_ringbuffer_attach_bo(ring, rsc->stencil->bo); + OUT_REG(ring, RB_STENCIL_INFO(CHIP, .separate_stencil = true), A6XX_RB_STENCIL_BUFFER_PITCH(stride), A6XX_RB_STENCIL_BUFFER_ARRAY_PITCH(array_stride), @@ -274,6 +285,13 @@ emit_lrz_clears(struct fd_batch *batch) struct fd_resource *zsbuf = fd_resource(pfb->zsbuf->texture); foreach_subpass (subpass, batch) { + /* The lrz buffer isn't explicitly tracked by the batch resource + * tracking (tracking the zsbuf is sufficient), but it still needs + * to be attached to the ring + */ + if (subpass->lrz) + fd_ringbuffer_attach_bo(batch->gmem, subpass->lrz); + if (!(subpass->fast_cleared & FD_BUFFER_LRZ)) continue; @@ -545,6 +563,9 @@ update_vsc_pipe(struct fd_batch *batch) fd_bo_new(ctx->screen->dev, sz, FD_BO_NOMAP, "vsc_prim_strm"); } + fd_ringbuffer_attach_bo(ring, fd6_ctx->vsc_draw_strm); + fd_ringbuffer_attach_bo(ring, fd6_ctx->vsc_prim_strm); + OUT_REG(ring, A6XX_VSC_BIN_SIZE(.width = gmem->bin_w, .height = gmem->bin_h), A6XX_VSC_DRAW_STRM_SIZE_ADDRESS(.bo = fd6_ctx->vsc_draw_strm, .bo_offset = max_vsc_pipes * @@ -570,9 +591,6 @@ update_vsc_pipe(struct fd_batch *batch) ring, A6XX_VSC_DRAW_STRM_ADDRESS(.bo = fd6_ctx->vsc_draw_strm), A6XX_VSC_DRAW_STRM_PITCH(.dword = fd6_ctx->vsc_draw_strm_pitch), A6XX_VSC_DRAW_STRM_LIMIT(.dword = fd6_ctx->vsc_draw_strm_pitch - 64)); - - fd_ringbuffer_attach_bo(ring, fd6_ctx->vsc_draw_strm); - fd_ringbuffer_attach_bo(ring, fd6_ctx->vsc_prim_strm); } /* @@ -697,6 +715,8 @@ emit_common_init(struct fd_batch *batch) if (!result) return; + fd_ringbuffer_attach_bo(ring, at->results_mem); + OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_CONTROL, 1); OUT_RING(ring, A6XX_RB_SAMPLE_COUNT_CONTROL_COPY); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc index d02b350cade..53aee8b7a7e 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc @@ -195,13 +195,15 @@ fd6_emit_shader(struct fd_context *ctx, struct fd_ringbuffer *ring, uint32_t per_sp_size = ctx->pvtmem[so->pvtmem_per_wave].per_sp_size; + fd_ringbuffer_attach_bo(ring, so->bo); + OUT_PKT4(ring, cfg->reg_sp_xs_first_exec_offset, 7); OUT_RING(ring, 0); /* SP_xS_OBJ_FIRST_EXEC_OFFSET */ OUT_RELOC(ring, so->bo, 0, 0, 0); /* SP_xS_OBJ_START_LO */ OUT_RING(ring, A6XX_SP_VS_PVT_MEM_PARAM_MEMSIZEPERITEM(ctx->pvtmem[so->pvtmem_per_wave].per_fiber_size)); if (so->pvtmem_size > 0) { /* SP_xS_PVT_MEM_ADDR */ - OUT_RELOC(ring, ctx->pvtmem[so->pvtmem_per_wave].bo, 0, 0, 0); fd_ringbuffer_attach_bo(ring, ctx->pvtmem[so->pvtmem_per_wave].bo); + OUT_RELOC(ring, ctx->pvtmem[so->pvtmem_per_wave].bo, 0, 0, 0); } else { OUT_RING(ring, 0); OUT_RING(ring, 0); @@ -225,8 +227,6 @@ fd6_emit_shader(struct fd_context *ctx, struct fd_ringbuffer *ring, CP_LOAD_STATE6_0_NUM_UNIT(shader_preload_size)); OUT_RELOC(ring, so->bo, 0, 0, 0); - fd_ringbuffer_attach_bo(ring, so->bo); - fd6_emit_immediates(so, ring); } @@ -467,6 +467,8 @@ fd6_emit_tess_bos(struct fd_screen *screen, struct fd_ringbuffer *ring, if (regid >= s->constlen) return; + fd_ringbuffer_attach_bo(ring, screen->tess_bo); + OUT_PKT7(ring, fd6_stage2opcode(s->type), 7); OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(regid) | CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) | diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_query.cc b/src/gallium/drivers/freedreno/a6xx/fd6_query.cc index a64c6dad381..8cb81141ebd 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_query.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_query.cc @@ -703,6 +703,9 @@ so_overflow_predicate_result_resource(struct fd_acc_query *aq, int index, struct fd_resource *dst, unsigned offset) { + fd_ringbuffer_attach_bo(ring, dst->bo); + fd_ringbuffer_attach_bo(ring, fd_resource(aq->prsc)->bo); + /* result = generated - emitted: */ OUT_PKT7(ring, CP_MEM_TO_MEM, 7); OUT_RING(ring, CP_MEM_TO_MEM_0_NEG_B | diff --git a/src/gallium/drivers/freedreno/freedreno_batch.c b/src/gallium/drivers/freedreno/freedreno_batch.c index eff58ccb35b..6af2c7af5b0 100644 --- a/src/gallium/drivers/freedreno/freedreno_batch.c +++ b/src/gallium/drivers/freedreno/freedreno_batch.c @@ -529,8 +529,6 @@ fd_batch_resource_write(struct fd_batch *batch, struct fd_resource *rsc) if (track->write_batch == batch) return; - fd_batch_write_prep(batch, rsc); - if (rsc->stencil) fd_batch_resource_write(batch, rsc->stencil); @@ -574,6 +572,8 @@ fd_batch_resource_write(struct fd_batch *batch, struct fd_resource *rsc) fd_batch_reference_locked(&track->write_batch, batch); fd_batch_add_resource(batch, rsc); + + fd_batch_write_prep(batch, rsc); } void diff --git a/src/gallium/drivers/freedreno/freedreno_query_acc.c b/src/gallium/drivers/freedreno/freedreno_query_acc.c index e3f4c69f89f..6dee86d70f3 100644 --- a/src/gallium/drivers/freedreno/freedreno_query_acc.c +++ b/src/gallium/drivers/freedreno/freedreno_query_acc.c @@ -84,13 +84,13 @@ fd_acc_query_resume(struct fd_acc_query *aq, struct fd_batch *batch) assert_dt { const struct fd_acc_sample_provider *p = aq->provider; - aq->batch = batch; - fd_batch_needs_flush(aq->batch); - p->resume(aq, aq->batch); - fd_screen_lock(batch->ctx->screen); fd_batch_resource_write(batch, fd_resource(aq->prsc)); fd_screen_unlock(batch->ctx->screen); + + aq->batch = batch; + fd_batch_needs_flush(aq->batch); + p->resume(aq, aq->batch); } static void diff --git a/src/gallium/drivers/freedreno/freedreno_query_acc.h b/src/gallium/drivers/freedreno/freedreno_query_acc.h index 8022842f9fc..eebe8c08095 100644 --- a/src/gallium/drivers/freedreno/freedreno_query_acc.h +++ b/src/gallium/drivers/freedreno/freedreno_query_acc.h @@ -138,6 +138,9 @@ copy_result(struct fd_ringbuffer *ring, enum pipe_query_value_type result_type, struct fd_resource *dst, unsigned dst_offset, struct fd_resource *src, unsigned src_offset) { + fd_ringbuffer_attach_bo(ring, dst->bo); + fd_ringbuffer_attach_bo(ring, src->bo); + OUT_PKT7(ring, CP_MEM_TO_MEM, 5); OUT_RING(ring, COND(result_type >= PIPE_QUERY_TYPE_I64, CP_MEM_TO_MEM_0_DOUBLE)); OUT_RELOC(ring, dst->bo, dst_offset, 0, 0);