From 35a4b8989fbd7314a5def5eecb634961cf016a29 Mon Sep 17 00:00:00 2001
From: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Date: Tue, 5 Jul 2022 13:05:43 -0400
Subject: [PATCH] zink: allow multiple tex components for depth tg4

this returns a vec4, so don't break the return type by clamping 1 component

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17427>
---
 src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index 94f38d658b9..6bb996c5aaa 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -3587,7 +3587,7 @@ emit_tex(struct ntv_context *ctx, nir_tex_instr *tex)
       return;
    }
    SpvId actual_dest_type;
-   if (dref)
+   if (dref && tex->op != nir_texop_tg4)
       actual_dest_type =
          spirv_builder_type_float(&ctx->builder,
                                   nir_dest_bit_size(tex->dest));