From 349e802e7887de676292a1ed1058b7b784d597fc Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Thu, 30 Jan 2025 11:26:44 -0500 Subject: [PATCH] ail,asahi,hk: distinguish logical vs allocation compression the hw uses the wrong definition of compressability of mip levels in some places, but not in others. we need to distinguish these for correct fast clears. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Mary Guillemard Part-of: --- src/asahi/layout/layout.c | 6 +++--- src/asahi/layout/layout.h | 19 +++++++++++++++++-- src/asahi/vulkan/hk_cmd_draw.c | 4 +++- src/gallium/drivers/asahi/agx_pipe.c | 2 +- src/gallium/drivers/asahi/agx_state.c | 2 +- 5 files changed, 25 insertions(+), 8 deletions(-) diff --git a/src/asahi/layout/layout.c b/src/asahi/layout/layout.c index 2690c6c4d8e..ec89ab80a9f 100644 --- a/src/asahi/layout/layout.c +++ b/src/asahi/layout/layout.c @@ -287,9 +287,9 @@ ail_initialize_compression(struct ail_layout *layout) unsigned compbuf_B = 0; - for (unsigned l = 0; l < layout->levels; ++l) { - if (!ail_is_level_compressed(layout, l)) - break; + for (unsigned l = 0; + l < layout->levels && ail_is_level_allocated_compressed(layout, l); + ++l) { layout->level_offsets_compressed_B[l] = compbuf_B; diff --git a/src/asahi/layout/layout.h b/src/asahi/layout/layout.h index ea8843b571a..3bcafb09720 100644 --- a/src/asahi/layout/layout.h +++ b/src/asahi/layout/layout.h @@ -336,7 +336,8 @@ ail_metadata_height_tl(struct ail_layout *layout, unsigned level) * pointless. This queries this case. */ static inline bool -ail_is_level_compressed(const struct ail_layout *layout, unsigned level) +ail_is_level_allocated_compressed(const struct ail_layout *layout, + unsigned level) { unsigned width_sa = ALIGN( ail_effective_width_sa(layout->width_px, layout->sample_count_sa), 16); @@ -348,12 +349,26 @@ ail_is_level_compressed(const struct ail_layout *layout, unsigned level) u_minify(MAX2(width_sa, height_sa), level) >= 16; } +static inline bool +ail_is_level_logically_compressed(const struct ail_layout *layout, + unsigned level) +{ + unsigned width_sa = + ail_effective_width_sa(layout->width_px, layout->sample_count_sa); + + unsigned height_sa = + ail_effective_height_sa(layout->height_px, layout->sample_count_sa); + + return layout->compressed && + u_minify(MIN2(width_sa, height_sa), level) >= 16; +} + static inline bool ail_is_level_twiddled_uncompressed(const struct ail_layout *layout, unsigned level) { if (layout->compressed) { - return !ail_is_level_compressed(layout, level); + return !ail_is_level_logically_compressed(layout, level); } else { return layout->tiling != AIL_TILING_LINEAR; } diff --git a/src/asahi/vulkan/hk_cmd_draw.c b/src/asahi/vulkan/hk_cmd_draw.c index 92528535590..e0f9de729ee 100644 --- a/src/asahi/vulkan/hk_cmd_draw.c +++ b/src/asahi/vulkan/hk_cmd_draw.c @@ -821,7 +821,9 @@ hk_CmdBeginRendering(VkCommandBuffer commandBuffer, uint8_t image_plane = view->planes[plane].image_plane; struct ail_layout *layout = &image->planes[image_plane].layout; - if (ail_is_level_compressed(layout, view->vk.base_mip_level)) { + if (ail_is_level_logically_compressed(layout, + view->vk.base_mip_level)) { + perf_debug(cmd, "Decompressing in-place"); unsigned level = view->vk.base_mip_level; diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c index a67a94d69c6..8542b658223 100644 --- a/src/gallium/drivers/asahi/agx_pipe.c +++ b/src/gallium/drivers/asahi/agx_pipe.c @@ -921,7 +921,7 @@ agx_transfer_map(struct pipe_context *pctx, struct pipe_resource *resource, * compression in software. In some cases, we could use this path for * twiddled too, but we don't have a use case for that yet. */ - bool staging_blit = ail_is_level_compressed(&rsrc->layout, level); + bool staging_blit = ail_is_level_logically_compressed(&rsrc->layout, level); agx_prepare_for_map(ctx, rsrc, level, usage, box, staging_blit); diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index f5cc6211a8a..d7db8f0bb0b 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -3392,7 +3392,7 @@ agx_batch_init_state(struct agx_batch *batch) struct ail_layout *layout = &rsrc->layout; unsigned level = surf->level; - if (!ail_is_level_compressed(layout, level)) + if (!ail_is_level_logically_compressed(layout, level)) continue; if (true || (rsrc->base.bind & PIPE_BIND_SHARED)) {