intel/dev: remove pci revision from shader cache key

Pci revision was included in the shader cache key because it can
enable platform workarounds.  While some platform workarounds exist in
the compiler, none are dependent on the silicon stepping.

Many platforms differ only in the pci revision id, causing needless
duplication in cache entries between platforms.

When a platform ships publicly with stepping-specific compiler
workarounds, pci id must be incorporated into the shader cache key.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28085>

src/intel/dev/intel_device_info.c

@@ -1763,6 +1763,14 @@ intel_device_info_update_after_hwconfig(struct intel_device_info *devinfo)
 enum intel_wa_steppings
 intel_device_info_wa_stepping(struct intel_device_info *devinfo)
 {
+   /* When adding platforms to this function, check to see if
+    * stepping-specific workarounds impact the compiler.
+    *
+    * If a stepping specific compiler workaround is required on a released
+    * platform, intel_device_info->revision must be added as a
+    * 'compiler_field' in intel_device_info.py
+    */
+
    if (devinfo->platform == INTEL_PLATFORM_TGL) {
       /* TGL production steppings: B0 and C0 */
       switch (devinfo->revision) {

src/intel/dev/intel_device_info.py

@@ -238,7 +238,7 @@ Struct("intel_device_info",
 
         Member("int", "verx10", compiler_field=True),
 
-        Member("int", "revision", compiler_field=True,
+        Member("int", "revision",
                comment=dedent("""\
                This revision is from ioctl (I915_PARAM_REVISION) unlike
                pci_revision_id from drm device. Its value is not always