From 321cb43c112039a02631a8357ab147264ad41bd5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 23 May 2024 16:50:58 -0400 Subject: [PATCH] radeonsi/gfx12: fix depth bounds register values Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 4cdb7876706..3c398c46688 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1619,9 +1619,9 @@ static void si_pm4_emit_dsa(struct si_context *sctx, unsigned index) } if (state->depth_bounds_enabled) { gfx12_opt_set_context_reg(R_028050_DB_DEPTH_BOUNDS_MIN, SI_TRACKED_DB_DEPTH_BOUNDS_MIN, - fui(state->db_depth_bounds_min)); + state->db_depth_bounds_min); gfx12_opt_set_context_reg(R_028054_DB_DEPTH_BOUNDS_MAX, SI_TRACKED_DB_DEPTH_BOUNDS_MAX, - fui(state->db_depth_bounds_max)); + state->db_depth_bounds_max); } gfx12_end_context_regs(); radeon_end(); /* don't track context rolls on GFX12 */