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blorp: Drop multisampled code in blorp_can_hiz_clear_depth

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Anv allows non-8x4-aligned depth buffer clears, but it has multisampled
HiZ disabled for BDW. iris allows multisampled HiZ on BDW, but disallows
non-8x4-aligned depth buffer clears.

Drop the unused optimization for non-8x4-aligned clears of multisampled
surfaces on BDW and use this opportunity to use some PRM text in the
code comment.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
This commit is contained in:
Nanley Chery
2021-12-05 20:46:16 -05:00
committed by Marge Bot
parent 0a01d2c04f
commit 30615794e4
1 changed files with 11 additions and 34 deletions
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src/intel/blorp/blorp_clear.c
+11 -34
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@@ -904,43 +904,20 @@ blorp_can_hiz_clear_depth(const struct intel_device_info *devinfo,
assert(devinfo->ver >= 8);
if (devinfo->ver == 8 && surf->format == ISL_FORMAT_R16_UNORM) {
/* Apply the D16 alignment restrictions. On BDW, HiZ has an 8x4 sample
* block with the following property: as the number of samples increases,
* the number of pixels representable by this block decreases by a factor
* of the sample dimensions. Sample dimensions scale following the MSAA
* interleaved pattern.
/* From the BDW PRM, Vol 7, "Depth Buffer Clear":
*
* Sample|Sample|Pixel
* Count |Dim |Dim
* ===================
* 1 | 1x1 | 8x4
* 2 | 2x1 | 4x4
* 4 | 2x2 | 4x2
* 8 | 4x2 | 2x2
* 16 | 4x4 | 2x1
* The following restrictions apply only if the depth buffer surface
* type is D16_UNORM and software does not use the “full surf clear”:
*
* Table: Pixel Dimensions in a HiZ Sample Block Pre-SKL
* If Number of Multisamples is NUMSAMPLES_1, the rectangle must be
* aligned to an 8x4 pixel block relative to the upper left corner of
* the depth buffer, and contain an integer number of these pixel
* blocks, and all 8x4 pixels must be lit.
*
* Alignment requirements for other sample counts are listed, but they
* can all be satisfied by the one mentioned above.
*/
const struct isl_extent2d sa_block_dim =
isl_get_interleaved_msaa_px_size_sa(surf->samples);
const uint8_t align_px_w = 8 / sa_block_dim.w;
const uint8_t align_px_h = 4 / sa_block_dim.h;
/* Fast depth clears clear an entire sample block at a time. As a result,
* the rectangle must be aligned to the dimensions of the encompassing
* pixel block for a successful operation.
*
* Fast clears can still work if the upper-left corner is aligned and the
* bottom-rigtht corner touches the edge of a depth buffer whose extent
* is unaligned. This is because each miplevel in the depth buffer is
* padded by the Pixel Dim (similar to a standard compressed texture).
* In this case, the clear rectangle could be padded by to match the full
* depth buffer extent but to support multiple clearing techniques, we
* chose to be unaware of the depth buffer's extent and thus don't handle
* this case.
*/
if (x0 % align_px_w || y0 % align_px_h ||
x1 % align_px_w || y1 % align_px_h)
if (x0 % 8 || y0 % 4 || x1 % 8 || y1 % 4)
return false;
} else if (aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT) {
/* We have to set the WM_HZ_OP::FullSurfaceDepthandStencilClear bit