From 2f82555efaa9d803079b6121f83a2d1c92748d8b Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 25 Sep 2024 11:33:53 -0700 Subject: [PATCH] freedreno/a6xx: Only emit VFD/PC_POWER_CNTL for a6xx Signed-off-by: Rob Clark Part-of: --- src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc index a1e76be8acf..2443445376e 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc @@ -958,11 +958,10 @@ emit_binning_pass(struct fd_batch *batch) assert_dt update_vsc_pipe(batch); - OUT_PKT4(ring, REG_A6XX_PC_POWER_CNTL, 1); - OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); - - OUT_PKT4(ring, REG_A6XX_VFD_POWER_CNTL, 1); - OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); + if (CHIP == A6XX) { + OUT_REG(ring, A6XX_PC_POWER_CNTL(screen->info->a6xx.magic.PC_POWER_CNTL)); + OUT_REG(ring, A6XX_VFD_POWER_CNTL(screen->info->a6xx.magic.PC_POWER_CNTL)); + } OUT_PKT7(ring, CP_EVENT_WRITE, 1); OUT_RING(ring, UNK_2C); @@ -1135,11 +1134,10 @@ fd6_emit_tile_init(struct fd_batch *batch) assert_dt OUT_PKT4(ring, REG_A6XX_VFD_MODE_CNTL, 1); OUT_RING(ring, 0x0); - OUT_PKT4(ring, REG_A6XX_PC_POWER_CNTL, 1); - OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); - - OUT_PKT4(ring, REG_A6XX_VFD_POWER_CNTL, 1); - OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); + if (CHIP == A6XX) { + OUT_REG(ring, A6XX_PC_POWER_CNTL(screen->info->a6xx.magic.PC_POWER_CNTL)); + OUT_REG(ring, A6XX_VFD_POWER_CNTL(screen->info->a6xx.magic.PC_POWER_CNTL)); + } OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); OUT_RING(ring, 0x1);