iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.

This commit introduces a new Gallium driver for Intel Gen8+ GPUs,
named 'iris_dri.so' after the hardware.

Developed by:
- Kenneth Graunke (overall driver)
- Dave Airlie (shaders, conditional render, overflow query, Gen8 port)
- Chris Wilson (fencing, pinned memory, ...)
- Jordan Justen (compute shaders)
- Jason Ekstrand (image load store)
- Caio Marcelo de Oliveira Filho (tessellation control passthrough)
- Rafael Antognolli (auxiliary buffer fixes)
- The rest of the i965 contributors and the Mesa community
This commit is contained in:
Kenneth Graunke
2017-11-23 23:15:14 -08:00
parent eac822eac1
commit 2dce0e94a3
29 changed files with 5631 additions and 10 deletions
+9
View File
@@ -23,6 +23,14 @@ static const int i965_chip_ids[] = {
#undef CHIPSET
};
static const int iris_chip_ids[] = {
#define CHIPSET(chip, family, name) chip,
#define IRIS 1
#include "pci_ids/i965_pci_ids.h"
#undef IRIS
#undef CHIPSET
};
static const int r100_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/radeon_pci_ids.h"
@@ -76,6 +84,7 @@ static const struct {
} driver_map[] = {
{ 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
{ 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
{ 0x8086, "iris", iris_chip_ids, ARRAY_SIZE(iris_chip_ids) },
{ 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
{ 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
{ 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },