iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.
This commit introduces a new Gallium driver for Intel Gen8+ GPUs, named 'iris_dri.so' after the hardware. Developed by: - Kenneth Graunke (overall driver) - Dave Airlie (shaders, conditional render, overflow query, Gen8 port) - Chris Wilson (fencing, pinned memory, ...) - Jordan Justen (compute shaders) - Jason Ekstrand (image load store) - Caio Marcelo de Oliveira Filho (tessellation control passthrough) - Rafael Antognolli (auxiliary buffer fixes) - The rest of the i965 contributors and the Mesa community
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@@ -23,6 +23,14 @@ static const int i965_chip_ids[] = {
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#undef CHIPSET
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};
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static const int iris_chip_ids[] = {
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#define CHIPSET(chip, family, name) chip,
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#define IRIS 1
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#include "pci_ids/i965_pci_ids.h"
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#undef IRIS
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#undef CHIPSET
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};
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static const int r100_chip_ids[] = {
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#define CHIPSET(chip, name, family) chip,
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#include "pci_ids/radeon_pci_ids.h"
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@@ -76,6 +84,7 @@ static const struct {
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} driver_map[] = {
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{ 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
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{ 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
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{ 0x8086, "iris", iris_chip_ids, ARRAY_SIZE(iris_chip_ids) },
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{ 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
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{ 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
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{ 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },
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