diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index 23aa602ebac..0b488cd3d76 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -388,10 +388,10 @@ convert_to_DPP(aco_ptr<Instruction>& instr, bool dpp8)
 }
 
 bool
-can_use_opsel(chip_class chip, aco_opcode op, int idx, bool high)
+can_use_opsel(chip_class chip, aco_opcode op, int idx)
 {
    /* opsel is only GFX9+ */
-   if ((high || idx == -1) && chip < GFX9)
+   if (chip < GFX9)
       return false;
 
    switch (op) {
@@ -485,7 +485,7 @@ instr_is_16bit(chip_class chip, aco_opcode op)
    // case aco_opcode::v_cvt_norm_i16_f16:
    // case aco_opcode::v_cvt_norm_u16_f16:
    /* on GFX10, all opsel instructions preserve the high bits */
-   default: return chip >= GFX10 && can_use_opsel(chip, op, -1, false);
+   default: return chip >= GFX10 && can_use_opsel(chip, op, -1);
    }
 }
 
diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h
index 8ec61795db3..fa37b962820 100644
--- a/src/amd/compiler/aco_ir.h
+++ b/src/amd/compiler/aco_ir.h
@@ -1777,7 +1777,7 @@ memory_sync_info get_sync_info(const Instruction* instr);
 
 bool is_dead(const std::vector<uint16_t>& uses, Instruction* instr);
 
-bool can_use_opsel(chip_class chip, aco_opcode op, int idx, bool high);
+bool can_use_opsel(chip_class chip, aco_opcode op, int idx);
 bool instr_is_16bit(chip_class chip, aco_opcode op);
 bool can_use_SDWA(chip_class chip, const aco_ptr<Instruction>& instr, bool pre_ra);
 bool can_use_DPP(const aco_ptr<Instruction>& instr, bool pre_ra, bool dpp8);
diff --git a/src/amd/compiler/aco_optimizer.cpp b/src/amd/compiler/aco_optimizer.cpp
index 4d1c5ed429f..56af25a11f7 100644
--- a/src/amd/compiler/aco_optimizer.cpp
+++ b/src/amd/compiler/aco_optimizer.cpp
@@ -1025,7 +1025,7 @@ can_apply_extract(opt_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, ssa_i
          return false;
       return true;
    } else if (instr->isVOP3() && sel.size() == 2 &&
-              can_use_opsel(ctx.program->chip_class, instr->opcode, idx, sel.offset()) &&
+              can_use_opsel(ctx.program->chip_class, instr->opcode, idx) &&
               !(instr->vop3().opsel & (1 << idx))) {
       return true;
    } else if (instr->opcode == aco_opcode::p_extract) {
@@ -3104,7 +3104,7 @@ apply_insert(opt_ctx& ctx, aco_ptr<Instruction>& instr)
    assert(sel);
 
    if (instr->isVOP3() && sel.size() == 2 && !sel.sign_extend() &&
-       can_use_opsel(ctx.program->chip_class, instr->opcode, -1, sel.offset())) {
+       can_use_opsel(ctx.program->chip_class, instr->opcode, -1)) {
       if (instr->vop3().opsel & (1 << 3))
          return false;
       if (sel.offset())
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index a41c61f1ff4..5b4733354ba 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -501,7 +501,7 @@ get_subdword_operand_stride(chip_class chip, const aco_ptr<Instruction>& instr,
    if (instr->isVALU()) {
       if (can_use_SDWA(chip, instr, false))
          return rc.bytes();
-      if (can_use_opsel(chip, instr->opcode, idx, true))
+      if (can_use_opsel(chip, instr->opcode, idx))
          return 2;
       if (instr->format == Format::VOP3P)
          return 2;
@@ -615,7 +615,7 @@ get_subdword_definition_info(Program* program, const aco_ptr<Instruction>& instr
 
       unsigned stride = 4u;
       if (instr->opcode == aco_opcode::v_fma_mixlo_f16 ||
-          can_use_opsel(chip, instr->opcode, -1, true))
+          can_use_opsel(chip, instr->opcode, -1))
          stride = 2u;
 
       return std::make_pair(stride, bytes_written);
@@ -681,7 +681,7 @@ add_subdword_definition(Program* program, aco_ptr<Instruction>& instr, PhysReg r
       /* check if we can use opsel */
       if (instr->format == Format::VOP3) {
          assert(reg.byte() == 2);
-         assert(can_use_opsel(chip, instr->opcode, -1, true));
+         assert(can_use_opsel(chip, instr->opcode, -1));
          instr->vop3().opsel |= (1 << 3); /* dst in high half */
          return;
       }
diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp
index 198aa072c0b..695f3c3c67b 100644
--- a/src/amd/compiler/aco_validate.cpp
+++ b/src/amd/compiler/aco_validate.cpp
@@ -777,7 +777,7 @@ validate_subdword_operand(chip_class chip, const aco_ptr<Instruction>& instr, un
    if (instr->isVOP3P())
       return ((instr->vop3p().opsel_lo >> index) & 1) == (byte >> 1) &&
              ((instr->vop3p().opsel_hi >> index) & 1) == (byte >> 1);
-   if (byte == 2 && can_use_opsel(chip, instr->opcode, index, 1))
+   if (byte == 2 && can_use_opsel(chip, instr->opcode, index))
       return true;
 
    switch (instr->opcode) {
@@ -830,7 +830,7 @@ validate_subdword_definition(chip_class chip, const aco_ptr<Instruction>& instr)
    if (instr->isSDWA())
       return byte + instr->sdwa().dst_sel.offset() + instr->sdwa().dst_sel.size() <= 4 &&
              byte % instr->sdwa().dst_sel.size() == 0;
-   if (byte == 2 && can_use_opsel(chip, instr->opcode, -1, 1))
+   if (byte == 2 && can_use_opsel(chip, instr->opcode, -1))
       return true;
 
    switch (instr->opcode) {