From 2c78d104b09346aeb97fced40c7e7d47ef8c498a Mon Sep 17 00:00:00 2001 From: Mark Collins Date: Fri, 16 Feb 2024 11:16:59 +0000 Subject: [PATCH] tu: Only set PC/VFD PWR_CNTL regs on A6XX These are no longer used on A7XX and should not be emitted. Signed-off-by: Mark Collins Part-of: --- src/freedreno/vulkan/tu_cmd_buffer.cc | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 7c759e7a9ed..f485744c8f5 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -1454,11 +1454,13 @@ tu6_emit_binning_pass(struct tu_cmd_buffer *cmd, struct tu_cs *cs) update_vsc_pipe(cmd, cs, phys_dev->info->num_vsc_pipes); - tu_cs_emit_regs(cs, - A6XX_PC_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); + if (CHIP == A6XX) { + tu_cs_emit_regs(cs, + A6XX_PC_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); - tu_cs_emit_regs(cs, - A6XX_VFD_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); + tu_cs_emit_regs(cs, + A6XX_VFD_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); + } tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1); tu_cs_emit(cs, UNK_2C); @@ -1819,11 +1821,13 @@ tu6_tile_render_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs, tu_cs_emit_regs(cs, A6XX_VFD_MODE_CNTL(RENDERING_PASS)); - tu_cs_emit_regs(cs, - A6XX_PC_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); + if (CHIP == A6XX) { + tu_cs_emit_regs(cs, + A6XX_PC_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); - tu_cs_emit_regs(cs, - A6XX_VFD_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); + tu_cs_emit_regs(cs, + A6XX_VFD_POWER_CNTL(phys_dev->info->a6xx.magic.PC_POWER_CNTL)); + } tu_cs_emit_pkt7(cs, CP_SKIP_IB2_ENABLE_GLOBAL, 1); tu_cs_emit(cs, 0x1);