diff --git a/src/amd/vulkan/meta/radv_meta_clear.c b/src/amd/vulkan/meta/radv_meta_clear.c index 2cf5799544a..84d85fade8d 100644 --- a/src/amd/vulkan/meta/radv_meta_clear.c +++ b/src/amd/vulkan/meta/radv_meta_clear.c @@ -60,87 +60,87 @@ static VkResult create_pipeline(struct radv_device *device, uint32_t samples, struct nir_shader *vs_nir, struct nir_shader *fs_nir, const VkPipelineVertexInputStateCreateInfo *vi_state, const VkPipelineDepthStencilStateCreateInfo *ds_state, - const VkPipelineColorBlendStateCreateInfo *cb_state, const VkPipelineRenderingCreateInfo *dyn_state, - const VkPipelineLayout layout, const struct radv_graphics_pipeline_create_info *extra, - const VkAllocationCallbacks *alloc, VkPipeline *pipeline) + const VkPipelineColorBlendStateCreateInfo *cb_state, const VkPipelineLayout layout, + const VkGraphicsPipelineCreateInfoRADV *radv_info, const VkAllocationCallbacks *alloc, + VkPipeline *pipeline) { VkDevice device_h = radv_device_to_handle(device); VkResult result; - result = radv_graphics_pipeline_create(device_h, device->meta_state.cache, - &(VkGraphicsPipelineCreateInfo){ - .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .pNext = dyn_state, - .stageCount = fs_nir ? 2 : 1, - .pStages = - (VkPipelineShaderStageCreateInfo[]){ - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_VERTEX_BIT, - .module = vk_shader_module_handle_from_nir(vs_nir), - .pName = "main", - }, - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_FRAGMENT_BIT, - .module = vk_shader_module_handle_from_nir(fs_nir), - .pName = "main", - }, - }, - .pVertexInputState = vi_state, - .pInputAssemblyState = - &(VkPipelineInputAssemblyStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, - .topology = VK_PRIMITIVE_TOPOLOGY_META_RECT_LIST_MESA, - .primitiveRestartEnable = false, - }, - .pViewportState = - &(VkPipelineViewportStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, - .viewportCount = 1, - .scissorCount = 1, - }, - .pRasterizationState = - &(VkPipelineRasterizationStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, - .rasterizerDiscardEnable = false, - .polygonMode = VK_POLYGON_MODE_FILL, - .cullMode = VK_CULL_MODE_NONE, - .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, - .depthBiasEnable = false, - .depthBiasConstantFactor = 0.0f, - .depthBiasClamp = 0.0f, - .depthBiasSlopeFactor = 0.0f, - .lineWidth = 1.0f, - }, - .pMultisampleState = - &(VkPipelineMultisampleStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, - .rasterizationSamples = samples, - .sampleShadingEnable = false, - .pSampleMask = NULL, - .alphaToCoverageEnable = false, - .alphaToOneEnable = false, - }, - .pDepthStencilState = ds_state, - .pColorBlendState = cb_state, - .pDynamicState = - &(VkPipelineDynamicStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, - .dynamicStateCount = 3, - .pDynamicStates = - (VkDynamicState[]){ - VK_DYNAMIC_STATE_VIEWPORT, - VK_DYNAMIC_STATE_SCISSOR, - VK_DYNAMIC_STATE_STENCIL_REFERENCE, - }, - }, - .layout = layout, - .flags = 0, - .renderPass = VK_NULL_HANDLE, - .subpass = 0, - }, - extra, alloc, pipeline); + result = radv_CreateGraphicsPipelines(device_h, device->meta_state.cache, 1, + &(VkGraphicsPipelineCreateInfo){ + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .pNext = radv_info, + .stageCount = fs_nir ? 2 : 1, + .pStages = + (VkPipelineShaderStageCreateInfo[]){ + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = vk_shader_module_handle_from_nir(vs_nir), + .pName = "main", + }, + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = vk_shader_module_handle_from_nir(fs_nir), + .pName = "main", + }, + }, + .pVertexInputState = vi_state, + .pInputAssemblyState = + &(VkPipelineInputAssemblyStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_META_RECT_LIST_MESA, + .primitiveRestartEnable = false, + }, + .pViewportState = + &(VkPipelineViewportStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 1, + .scissorCount = 1, + }, + .pRasterizationState = + &(VkPipelineRasterizationStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, + .depthBiasEnable = false, + .depthBiasConstantFactor = 0.0f, + .depthBiasClamp = 0.0f, + .depthBiasSlopeFactor = 0.0f, + .lineWidth = 1.0f, + }, + .pMultisampleState = + &(VkPipelineMultisampleStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = samples, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pDepthStencilState = ds_state, + .pColorBlendState = cb_state, + .pDynamicState = + &(VkPipelineDynamicStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 3, + .pDynamicStates = + (VkDynamicState[]){ + VK_DYNAMIC_STATE_VIEWPORT, + VK_DYNAMIC_STATE_SCISSOR, + VK_DYNAMIC_STATE_STENCIL_REFERENCE, + }, + }, + .layout = layout, + .flags = 0, + .renderPass = VK_NULL_HANDLE, + .subpass = 0, + }, + alloc, pipeline); ralloc_free(vs_nir); ralloc_free(fs_nir); @@ -209,10 +209,13 @@ create_color_pipeline(struct radv_device *device, uint32_t samples, uint32_t fra .pColorAttachmentFormats = att_formats, }; - struct radv_graphics_pipeline_create_info extra = {0}; + const VkGraphicsPipelineCreateInfoRADV radv_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV, + .pNext = &rendering_create_info, + }; - result = create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state, &rendering_create_info, - device->meta_state.clear_color_p_layout, &extra, &device->meta_state.alloc, pipeline); + result = create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state, + device->meta_state.clear_color_p_layout, &radv_info, &device->meta_state.alloc, pipeline); return result; } @@ -481,16 +484,20 @@ create_depthstencil_pipeline(struct radv_device *device, VkImageAspectFlags aspe .stencilAttachmentFormat = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) ? VK_FORMAT_S8_UINT : VK_FORMAT_UNDEFINED, }; - struct radv_graphics_pipeline_create_info extra = {0}; + VkGraphicsPipelineCreateInfoRADV radv_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV, + .pNext = &rendering_create_info, + }; if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) { - extra.db_depth_clear = index == DEPTH_CLEAR_SLOW ? false : true; + radv_info.db_depth_clear = index == DEPTH_CLEAR_SLOW ? false : true; } if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { - extra.db_stencil_clear = index == DEPTH_CLEAR_SLOW ? false : true; + radv_info.db_stencil_clear = index == DEPTH_CLEAR_SLOW ? false : true; } - result = create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state, &rendering_create_info, - device->meta_state.clear_depth_p_layout, &extra, &device->meta_state.alloc, pipeline); + + result = create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state, + device->meta_state.clear_depth_p_layout, &radv_info, &device->meta_state.alloc, pipeline); return result; } diff --git a/src/amd/vulkan/meta/radv_meta_decompress.c b/src/amd/vulkan/meta/radv_meta_decompress.c index 02b1a337670..18ee657d1fb 100644 --- a/src/amd/vulkan/meta/radv_meta_decompress.c +++ b/src/amd/vulkan/meta/radv_meta_decompress.c @@ -116,9 +116,16 @@ create_pipeline_gfx(struct radv_device *device, uint32_t samples, VkPipelineLayo .stencilAttachmentFormat = VK_FORMAT_D32_SFLOAT_S8_UINT, }; + const VkGraphicsPipelineCreateInfoRADV radv_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV, + .pNext = &rendering_create_info, + .depth_compress_disable = true, + .stencil_compress_disable = true, + }; + const VkGraphicsPipelineCreateInfo pipeline_create_info = { .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .pNext = &rendering_create_info, + .pNext = &radv_info, .stageCount = 2, .pStages = (VkPipelineShaderStageCreateInfo[]){ @@ -203,13 +210,8 @@ create_pipeline_gfx(struct radv_device *device, uint32_t samples, VkPipelineLayo .subpass = 0, }; - struct radv_graphics_pipeline_create_info extra = { - .depth_compress_disable = true, - .stencil_compress_disable = true, - }; - - result = radv_graphics_pipeline_create(device_h, device->meta_state.cache, &pipeline_create_info, &extra, - &device->meta_state.alloc, pipeline); + result = radv_CreateGraphicsPipelines(device_h, device->meta_state.cache, 1, &pipeline_create_info, + &device->meta_state.alloc, pipeline); ralloc_free(fs_module); ralloc_free(vs_module); diff --git a/src/amd/vulkan/meta/radv_meta_fast_clear.c b/src/amd/vulkan/meta/radv_meta_fast_clear.c index 19212c2ec69..98f7b17b251 100644 --- a/src/amd/vulkan/meta/radv_meta_fast_clear.c +++ b/src/amd/vulkan/meta/radv_meta_fast_clear.c @@ -175,109 +175,122 @@ create_pipeline(struct radv_device *device, VkShaderModule vs_module_h, VkPipeli .pColorAttachmentFormats = &color_format, }; - result = radv_graphics_pipeline_create(device_h, device->meta_state.cache, - &(VkGraphicsPipelineCreateInfo){ - .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .pNext = &rendering_create_info, - .stageCount = 2, - .pStages = stages, + const VkGraphicsPipelineCreateInfoRADV radv_eliminate_fast_clear_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV, + .pNext = &rendering_create_info, + .custom_blend_mode = V_028808_CB_ELIMINATE_FAST_CLEAR, + }; - .pVertexInputState = &vi_state, - .pInputAssemblyState = &ia_state, + result = radv_CreateGraphicsPipelines(device_h, device->meta_state.cache, 1, + &(VkGraphicsPipelineCreateInfo){ + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .pNext = &radv_eliminate_fast_clear_info, + .stageCount = 2, + .pStages = stages, - .pViewportState = - &(VkPipelineViewportStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, - .viewportCount = 1, - .scissorCount = 1, - }, - .pRasterizationState = &rs_state, - .pMultisampleState = - &(VkPipelineMultisampleStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, - .rasterizationSamples = 1, - .sampleShadingEnable = false, - .pSampleMask = NULL, - .alphaToCoverageEnable = false, - .alphaToOneEnable = false, - }, - .pColorBlendState = &blend_state, - .pDynamicState = - &(VkPipelineDynamicStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, - .dynamicStateCount = 2, - .pDynamicStates = - (VkDynamicState[]){ - VK_DYNAMIC_STATE_VIEWPORT, - VK_DYNAMIC_STATE_SCISSOR, - }, - }, - .layout = layout, - .renderPass = VK_NULL_HANDLE, - .subpass = 0, - }, - &(struct radv_graphics_pipeline_create_info){ - .custom_blend_mode = V_028808_CB_ELIMINATE_FAST_CLEAR, - }, - &device->meta_state.alloc, - &device->meta_state.fast_clear_flush.cmask_eliminate_pipeline); + .pVertexInputState = &vi_state, + .pInputAssemblyState = &ia_state, + + .pViewportState = + &(VkPipelineViewportStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 1, + .scissorCount = 1, + }, + .pRasterizationState = &rs_state, + .pMultisampleState = + &(VkPipelineMultisampleStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pColorBlendState = &blend_state, + .pDynamicState = + &(VkPipelineDynamicStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 2, + .pDynamicStates = + (VkDynamicState[]){ + VK_DYNAMIC_STATE_VIEWPORT, + VK_DYNAMIC_STATE_SCISSOR, + }, + }, + .layout = layout, + .renderPass = VK_NULL_HANDLE, + .subpass = 0, + }, + &device->meta_state.alloc, + &device->meta_state.fast_clear_flush.cmask_eliminate_pipeline); if (result != VK_SUCCESS) goto cleanup; - result = radv_graphics_pipeline_create(device_h, device->meta_state.cache, - &(VkGraphicsPipelineCreateInfo){ - .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .pNext = &rendering_create_info, - .stageCount = 2, - .pStages = stages, + const VkGraphicsPipelineCreateInfoRADV radv_fmask_decompress_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV, + .pNext = &rendering_create_info, + .custom_blend_mode = V_028808_CB_FMASK_DECOMPRESS, + }; - .pVertexInputState = &vi_state, - .pInputAssemblyState = &ia_state, + result = radv_CreateGraphicsPipelines(device_h, device->meta_state.cache, 1, + &(VkGraphicsPipelineCreateInfo){ + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .pNext = &radv_fmask_decompress_info, + .stageCount = 2, + .pStages = stages, - .pViewportState = - &(VkPipelineViewportStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, - .viewportCount = 1, - .scissorCount = 1, - }, - .pRasterizationState = &rs_state, - .pMultisampleState = - &(VkPipelineMultisampleStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, - .rasterizationSamples = 1, - .sampleShadingEnable = false, - .pSampleMask = NULL, - .alphaToCoverageEnable = false, - .alphaToOneEnable = false, - }, - .pColorBlendState = &blend_state, - .pDynamicState = - &(VkPipelineDynamicStateCreateInfo){ - .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, - .dynamicStateCount = 2, - .pDynamicStates = - (VkDynamicState[]){ - VK_DYNAMIC_STATE_VIEWPORT, - VK_DYNAMIC_STATE_SCISSOR, - }, - }, - .layout = layout, - .renderPass = VK_NULL_HANDLE, - .subpass = 0, - }, - &(struct radv_graphics_pipeline_create_info){ - .custom_blend_mode = V_028808_CB_FMASK_DECOMPRESS, - }, - &device->meta_state.alloc, - &device->meta_state.fast_clear_flush.fmask_decompress_pipeline); + .pVertexInputState = &vi_state, + .pInputAssemblyState = &ia_state, + + .pViewportState = + &(VkPipelineViewportStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 1, + .scissorCount = 1, + }, + .pRasterizationState = &rs_state, + .pMultisampleState = + &(VkPipelineMultisampleStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pColorBlendState = &blend_state, + .pDynamicState = + &(VkPipelineDynamicStateCreateInfo){ + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 2, + .pDynamicStates = + (VkDynamicState[]){ + VK_DYNAMIC_STATE_VIEWPORT, + VK_DYNAMIC_STATE_SCISSOR, + }, + }, + .layout = layout, + .renderPass = VK_NULL_HANDLE, + .subpass = 0, + }, + &device->meta_state.alloc, + &device->meta_state.fast_clear_flush.fmask_decompress_pipeline); if (result != VK_SUCCESS) goto cleanup; - result = radv_graphics_pipeline_create( - device_h, device->meta_state.cache, + const VkGraphicsPipelineCreateInfoRADV radv_dcc_decompress_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV, + .pNext = &rendering_create_info, + .custom_blend_mode = + pdev->info.gfx_level >= GFX11 ? V_028808_CB_DCC_DECOMPRESS_GFX11 : V_028808_CB_DCC_DECOMPRESS_GFX8, + }; + + result = radv_CreateGraphicsPipelines( + device_h, device->meta_state.cache, 1, &(VkGraphicsPipelineCreateInfo){ .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .pNext = &rendering_create_info, + .pNext = &radv_dcc_decompress_info, .stageCount = 2, .pStages = stages, @@ -315,10 +328,6 @@ create_pipeline(struct radv_device *device, VkShaderModule vs_module_h, VkPipeli .renderPass = VK_NULL_HANDLE, .subpass = 0, }, - &(struct radv_graphics_pipeline_create_info){ - .custom_blend_mode = - pdev->info.gfx_level >= GFX11 ? V_028808_CB_DCC_DECOMPRESS_GFX11 : V_028808_CB_DCC_DECOMPRESS_GFX8, - }, &device->meta_state.alloc, &device->meta_state.fast_clear_flush.dcc_decompress_pipeline); if (result != VK_SUCCESS) goto cleanup; diff --git a/src/amd/vulkan/meta/radv_meta_resolve.c b/src/amd/vulkan/meta/radv_meta_resolve.c index fca6f359570..31a419fc3b7 100644 --- a/src/amd/vulkan/meta/radv_meta_resolve.c +++ b/src/amd/vulkan/meta/radv_meta_resolve.c @@ -50,11 +50,17 @@ create_pipeline(struct radv_device *device, VkFormat format, VkPipeline *pipelin .pColorAttachmentFormats = color_formats, }; - result = radv_graphics_pipeline_create( - device_h, device->meta_state.cache, + const VkGraphicsPipelineCreateInfoRADV radv_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV, + .pNext = &rendering_create_info, + .custom_blend_mode = V_028808_CB_RESOLVE, + }; + + result = radv_CreateGraphicsPipelines( + device_h, device->meta_state.cache, 1, &(VkGraphicsPipelineCreateInfo){ .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .pNext = &rendering_create_info, + .pNext = &radv_info, .stageCount = 2, .pStages = (VkPipelineShaderStageCreateInfo[]){ @@ -137,9 +143,6 @@ create_pipeline(struct radv_device *device, VkFormat format, VkPipeline *pipelin .renderPass = VK_NULL_HANDLE, .subpass = 0, }, - &(struct radv_graphics_pipeline_create_info){ - .custom_blend_mode = V_028808_CB_RESOLVE, - }, &device->meta_state.alloc, pipeline); ralloc_free(vs_module); diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 9e89664ccfc..0de369dafe6 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -3275,17 +3275,16 @@ radv_pipeline_init_vgt_gs_out(struct radv_graphics_pipeline *pipeline, const str } static void -radv_pipeline_init_extra(struct radv_graphics_pipeline *pipeline, - const struct radv_graphics_pipeline_create_info *extra, +radv_pipeline_init_extra(struct radv_graphics_pipeline *pipeline, const VkGraphicsPipelineCreateInfoRADV *radv_info, const struct vk_graphics_pipeline_state *state) { - pipeline->custom_blend_mode = extra->custom_blend_mode; + pipeline->custom_blend_mode = radv_info->custom_blend_mode; if (radv_pipeline_has_ds_attachments(state->rp)) { - pipeline->db_render_control |= S_028000_DEPTH_CLEAR_ENABLE(extra->db_depth_clear); - pipeline->db_render_control |= S_028000_STENCIL_CLEAR_ENABLE(extra->db_stencil_clear); - pipeline->db_render_control |= S_028000_DEPTH_COMPRESS_DISABLE(extra->depth_compress_disable); - pipeline->db_render_control |= S_028000_STENCIL_COMPRESS_DISABLE(extra->stencil_compress_disable); + pipeline->db_render_control |= S_028000_DEPTH_CLEAR_ENABLE(radv_info->db_depth_clear); + pipeline->db_render_control |= S_028000_STENCIL_CLEAR_ENABLE(radv_info->db_stencil_clear); + pipeline->db_render_control |= S_028000_DEPTH_COMPRESS_DISABLE(radv_info->depth_compress_disable); + pipeline->db_render_control |= S_028000_STENCIL_COMPRESS_DISABLE(radv_info->stencil_compress_disable); } } @@ -3365,8 +3364,7 @@ radv_graphics_pipeline_import_binaries(struct radv_device *device, struct radv_g static VkResult radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv_device *device, - struct vk_pipeline_cache *cache, const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct radv_graphics_pipeline_create_info *extra) + struct vk_pipeline_cache *cache, const VkGraphicsPipelineCreateInfo *pCreateInfo) { bool fast_linking_enabled = radv_is_fast_linking_enabled(pCreateInfo); struct radv_graphics_pipeline_state gfx_state; @@ -3436,17 +3434,18 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv pipeline->base.push_constant_size = gfx_state.layout.push_constant_size; pipeline->base.dynamic_offset_count = gfx_state.layout.dynamic_offset_count; - if (extra) { - radv_pipeline_init_extra(pipeline, extra, &gfx_state.vk); + const VkGraphicsPipelineCreateInfoRADV *radv_info = + vk_find_struct_const(pCreateInfo->pNext, GRAPHICS_PIPELINE_CREATE_INFO_RADV); + if (radv_info) { + radv_pipeline_init_extra(pipeline, radv_info, &gfx_state.vk); } radv_graphics_pipeline_state_finish(device, &gfx_state); return result; } -VkResult +static VkResult radv_graphics_pipeline_create(VkDevice _device, VkPipelineCache _cache, const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct radv_graphics_pipeline_create_info *extra, const VkAllocationCallbacks *pAllocator, VkPipeline *pPipeline) { VK_FROM_HANDLE(radv_device, device, _device); @@ -3462,7 +3461,7 @@ radv_graphics_pipeline_create(VkDevice _device, VkPipelineCache _cache, const Vk pipeline->base.create_flags = vk_graphics_pipeline_create_flags(pCreateInfo); pipeline->base.is_internal = _cache == device->meta_state.cache; - result = radv_graphics_pipeline_init(pipeline, device, cache, pCreateInfo, extra); + result = radv_graphics_pipeline_init(pipeline, device, cache, pCreateInfo); if (result != VK_SUCCESS) { radv_pipeline_destroy(device, &pipeline->base, pAllocator); return result; @@ -3613,7 +3612,7 @@ radv_CreateGraphicsPipelines(VkDevice _device, VkPipelineCache pipelineCache, ui if (create_flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR) { r = radv_graphics_lib_pipeline_create(_device, pipelineCache, &pCreateInfos[i], pAllocator, &pPipelines[i]); } else { - r = radv_graphics_pipeline_create(_device, pipelineCache, &pCreateInfos[i], NULL, pAllocator, &pPipelines[i]); + r = radv_graphics_pipeline_create(_device, pipelineCache, &pCreateInfos[i], pAllocator, &pPipelines[i]); } if (r != VK_SUCCESS) { result = r; diff --git a/src/amd/vulkan/radv_pipeline_graphics.h b/src/amd/vulkan/radv_pipeline_graphics.h index 2cea168210f..5005e6b5f66 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.h +++ b/src/amd/vulkan/radv_pipeline_graphics.h @@ -20,6 +20,20 @@ #include "vk_graphics_state.h" #include "vk_meta.h" +#define VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV (VkStructureType)2000290001 + +#define VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO_RADV_cast VkGraphicsPipelineCreateInfoRADV + +typedef struct VkGraphicsPipelineCreateInfoRADV { + VkStructureType sType; + const void *pNext; + VkBool32 db_depth_clear; + VkBool32 db_stencil_clear; + VkBool32 depth_compress_disable; + VkBool32 stencil_compress_disable; + uint32_t custom_blend_mode; +} VkGraphicsPipelineCreateInfoRADV; + struct radv_sample_locations_state { VkSampleCountFlagBits per_pixel; VkExtent2D grid_size; @@ -621,19 +635,6 @@ uint32_t radv_get_vgt_gs_out(struct radv_shader **shaders, uint32_t primitive_to bool radv_needs_null_export_workaround(const struct radv_device *device, const struct radv_shader *ps, unsigned custom_blend_mode); -struct radv_graphics_pipeline_create_info { - bool db_depth_clear; - bool db_stencil_clear; - bool depth_compress_disable; - bool stencil_compress_disable; - uint32_t custom_blend_mode; -}; - -VkResult radv_graphics_pipeline_create(VkDevice device, VkPipelineCache cache, - const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct radv_graphics_pipeline_create_info *extra, - const VkAllocationCallbacks *alloc, VkPipeline *pPipeline); - void radv_destroy_graphics_pipeline(struct radv_device *device, struct radv_graphics_pipeline *pipeline); void radv_destroy_graphics_lib_pipeline(struct radv_device *device, struct radv_graphics_lib_pipeline *pipeline);