intel/elk: Remove FB_WRITE_LOGICAL_SRC_SRC_STENCIL
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
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@@ -240,7 +240,6 @@ enum fb_write_logical_srcs {
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FB_WRITE_LOGICAL_SRC_SRC0_ALPHA,
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FB_WRITE_LOGICAL_SRC_SRC_DEPTH, /* gl_FragDepth */
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FB_WRITE_LOGICAL_SRC_DST_DEPTH, /* GFX4-5: passthrough from thread */
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FB_WRITE_LOGICAL_SRC_SRC_STENCIL, /* gl_FragStencilRefARB */
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FB_WRITE_LOGICAL_SRC_OMASK, /* Sample Mask (gl_SampleMask) */
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FB_WRITE_LOGICAL_SRC_COMPONENTS, /* REQUIRED */
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FB_WRITE_LOGICAL_NUM_SRCS
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@@ -1150,11 +1150,10 @@ try_constant_propagate(const elk_compiler *compiler, elk_fs_inst *inst,
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break;
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case ELK_FS_OPCODE_FB_WRITE_LOGICAL:
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/* The stencil and omask sources of ELK_FS_OPCODE_FB_WRITE_LOGICAL are
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/* The omask source of ELK_FS_OPCODE_FB_WRITE_LOGICAL is
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* bit-cast using a strided region so they cannot be immediates.
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*/
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if (arg != FB_WRITE_LOGICAL_SRC_SRC_STENCIL &&
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arg != FB_WRITE_LOGICAL_SRC_OMASK) {
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if (arg != FB_WRITE_LOGICAL_SRC_OMASK) {
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inst->src[arg] = val;
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progress = true;
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}
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@@ -674,7 +674,7 @@ elk_fs_visitor::emit_single_fb_write(const fs_builder &bld,
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/* Hand over gl_FragDepth or the payload depth. */
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const elk_fs_reg dst_depth = fetch_payload_reg(bld, fs_payload().dest_depth_reg);
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elk_fs_reg src_depth, src_stencil;
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elk_fs_reg src_depth;
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if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
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src_depth = frag_depth;
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@@ -690,11 +690,8 @@ elk_fs_visitor::emit_single_fb_write(const fs_builder &bld,
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src_depth = fetch_payload_reg(bld, fs_payload().source_depth_reg);
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}
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if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL))
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src_stencil = frag_stencil;
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const elk_fs_reg sources[] = {
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color0, color1, src0_alpha, src_depth, dst_depth, src_stencil,
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color0, color1, src0_alpha, src_depth, dst_depth,
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(prog_data->uses_omask ? sample_mask : elk_fs_reg()),
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elk_imm_ud(components)
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};
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@@ -771,15 +768,6 @@ elk_fs_visitor::emit_fb_writes()
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limit_dispatch_width(8, "Depth writes unsupported in SIMD16+ mode.\n");
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}
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if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) {
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/* From the 'Render Target Write message' section of the docs:
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* "Output Stencil is not supported with SIMD16 Render Target Write
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* Messages."
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*/
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limit_dispatch_width(8, "gl_FragStencilRefARB unsupported "
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"in SIMD16+ mode.\n");
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}
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/* ANV doesn't know about sample mask output during the wm key creation
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* so we compute if we need replicate alpha and emit alpha to coverage
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* workaround here.
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@@ -155,7 +155,6 @@ lower_fb_write_logical_send(const fs_builder &bld, elk_fs_inst *inst,
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const elk_fs_reg src0_alpha = inst->src[FB_WRITE_LOGICAL_SRC_SRC0_ALPHA];
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const elk_fs_reg src_depth = inst->src[FB_WRITE_LOGICAL_SRC_SRC_DEPTH];
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const elk_fs_reg dst_depth = inst->src[FB_WRITE_LOGICAL_SRC_DST_DEPTH];
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const elk_fs_reg src_stencil = inst->src[FB_WRITE_LOGICAL_SRC_SRC_STENCIL];
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elk_fs_reg sample_mask = inst->src[FB_WRITE_LOGICAL_SRC_OMASK];
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const unsigned components =
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inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].ud;
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@@ -328,23 +327,6 @@ lower_fb_write_logical_send(const fs_builder &bld, elk_fs_inst *inst,
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length++;
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}
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if (src_stencil.file != BAD_FILE) {
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assert(devinfo->ver >= 9);
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assert(bld.dispatch_width() == 8 * reg_unit(devinfo));
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/* XXX: src_stencil is only available on gfx9+. dst_depth is never
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* available on gfx9+. As such it's impossible to have both enabled at the
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* same time and therefore length cannot overrun the array.
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*/
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assert(length < 15 * reg_unit(devinfo));
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sources[length] = bld.vgrf(ELK_REGISTER_TYPE_UD);
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bld.exec_all().annotate("FB write OS")
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.MOV(retype(sources[length], ELK_REGISTER_TYPE_UB),
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subscript(src_stencil, ELK_REGISTER_TYPE_UB, 0));
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length++;
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}
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elk_fs_inst *load;
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if (devinfo->ver >= 7) {
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/* Send from the GRF */
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