From 2a02f567aa3961c4880b099bc9aeaa4349db7c25 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 22 Feb 2023 16:32:26 +0100 Subject: [PATCH] radv: lower nir_intrinsic_load_fully_covered The sample coverage VGPR input would be the inner coverage and 0 means it's uncovered. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_nir_lower_abi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/amd/vulkan/radv_nir_lower_abi.c b/src/amd/vulkan/radv_nir_lower_abi.c index c61f92000a9..2ed0497140d 100644 --- a/src/amd/vulkan/radv_nir_lower_abi.c +++ b/src/amd/vulkan/radv_nir_lower_abi.c @@ -447,6 +447,11 @@ lower_abi_instr(nir_builder *b, nir_instr *instr, void *state) case nir_intrinsic_load_force_vrs_rates_amd: replacement = ac_nir_load_arg(b, &s->args->ac, s->args->ac.force_vrs_rates); break; + case nir_intrinsic_load_fully_covered: { + nir_ssa_def *sample_coverage = ac_nir_load_arg(b, &s->args->ac, s->args->ac.sample_coverage); + replacement = nir_ine_imm(b, sample_coverage, 0); + break; + } default: progress = false; break;