From 28034aac34dba480d94991fa3c19916daa163785 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sun, 21 Apr 2024 01:10:59 -0700 Subject: [PATCH] intel/brw: Combine a1/a16 3src type encoding functions Align16 is only used on Gfx9, while Align1 is used on Gfx11+. We can handle both encodings in the same function with a simple devinfo check, and give that function a simple name like brw_type_encode_for_3src. Reviewed-by: Caio Oliveira Part-of: --- src/intel/compiler/brw_inst.h | 6 +-- src/intel/compiler/brw_reg_type.c | 63 +++++++++++-------------- src/intel/compiler/brw_reg_type.h | 8 +--- src/intel/compiler/test_eu_validate.cpp | 6 ++- 4 files changed, 36 insertions(+), 47 deletions(-) diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h index c796e8c62d0..a83e0ad97d1 100644 --- a/src/intel/compiler/brw_inst.h +++ b/src/intel/compiler/brw_inst.h @@ -385,7 +385,7 @@ static inline void \ brw_inst_set_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ brw_inst *inst, enum brw_reg_type type) \ { \ - unsigned hw_type = brw_reg_type_to_a16_hw_3src_type(devinfo, type); \ + unsigned hw_type = brw_type_encode_for_3src(devinfo, type); \ brw_inst_set_3src_a16_##reg##_hw_type(devinfo, inst, hw_type); \ } \ \ @@ -455,7 +455,7 @@ brw_inst_set_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ } else { \ assert(exec_type == BRW_ALIGN1_3SRC_EXEC_TYPE_INT); \ } \ - unsigned hw_type = brw_reg_type_to_a1_hw_3src_type(devinfo, type); \ + unsigned hw_type = brw_type_encode_for_3src(devinfo, type); \ brw_inst_set_3src_a1_##reg##_hw_type(devinfo, inst, hw_type); \ } \ \ @@ -565,7 +565,7 @@ brw_inst_set_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ } else { \ assert(exec_type == BRW_ALIGN1_3SRC_EXEC_TYPE_INT); \ } \ - unsigned hw_type = brw_reg_type_to_a1_hw_3src_type(devinfo, type); \ + unsigned hw_type = brw_type_encode_for_3src(devinfo, type); \ brw_inst_set_dpas_3src_##reg##_hw_type(devinfo, inst, hw_type); \ } \ \ diff --git a/src/intel/compiler/brw_reg_type.c b/src/intel/compiler/brw_reg_type.c index 47fc320cd61..aa86787e973 100644 --- a/src/intel/compiler/brw_reg_type.c +++ b/src/intel/compiler/brw_reg_type.c @@ -186,50 +186,41 @@ brw_hw_type_to_reg_type(const struct intel_device_info *devinfo, } /** - * Convert a brw_reg_type enumeration value into the hardware representation - * for a 3-src align16 instruction + * Convert a brw_reg_type into the hardware encoding for a 3-src instruction. */ unsigned -brw_reg_type_to_a16_hw_3src_type(const struct intel_device_info *devinfo, - enum brw_reg_type type) -{ - static const unsigned tbl[] = { - [0 ... BRW_TYPE_LAST] = BRW_TYPE_INVALID, - [BRW_TYPE_F] = 0, - [BRW_TYPE_D] = 1, - [BRW_TYPE_UD] = 2, - [BRW_TYPE_DF] = 3, - [BRW_TYPE_HF] = 4, - }; - assert(type < ARRAY_SIZE(tbl)); - return tbl[type]; -} - -/** - * Convert a brw_reg_type enumeration value into the hardware representation - * for a 3-src align1 instruction - */ -unsigned -brw_reg_type_to_a1_hw_3src_type(const struct intel_device_info *devinfo, - enum brw_reg_type type) +brw_type_encode_for_3src(const struct intel_device_info *devinfo, + enum brw_reg_type type) { if (devinfo->ver >= 12) { /* size mask and SINT type bit match exactly */ return type & 0b111; - } + } else if (devinfo->ver >= 11) { + if (brw_type_is_float(type)) { + /* HF: 0b000 | F: 0b001 | DF: 0b010; subtract 1 from our size mask */ + return (type & BRW_TYPE_SIZE_MASK) - 1; + } - if (brw_type_is_float(type)) { - /* HF: 0b000 | F: 0b001 | DF: 0b010; subtract 1 from our size mask */ - return (type & BRW_TYPE_SIZE_MASK) - 1; + /* Bit 0 is the sign bit, bits 1-2 are our size mask reversed. + * UD: 0b000 | D: 0b001 + * UW: 0b010 | W: 0b011 + * UB: 0b100 | B: 0b101 + */ + return ((2 - (type & BRW_TYPE_SIZE_MASK)) << 1) | + (brw_type_is_sint(type) ? 1 : 0); + } else { + /* align16 encodings */ + static const unsigned tbl[] = { + [0 ... BRW_TYPE_LAST] = BRW_TYPE_INVALID, + [BRW_TYPE_F] = 0, + [BRW_TYPE_D] = 1, + [BRW_TYPE_UD] = 2, + [BRW_TYPE_DF] = 3, + [BRW_TYPE_HF] = 4, + }; + assert(type < ARRAY_SIZE(tbl)); + return tbl[type]; } - - /* Bit 0 is the sign bit, bits 1-2 are our size mask reversed. - * UD: 0b000 | D: 0b001 - * UW: 0b010 | W: 0b011 - * UB: 0b100 | B: 0b101 - */ - return ((2 - (type & BRW_TYPE_SIZE_MASK)) << 1) | - (brw_type_is_sint(type) ? 1 : 0); } /** diff --git a/src/intel/compiler/brw_reg_type.h b/src/intel/compiler/brw_reg_type.h index 194f09d9598..d7f7adce72b 100644 --- a/src/intel/compiler/brw_reg_type.h +++ b/src/intel/compiler/brw_reg_type.h @@ -162,12 +162,8 @@ brw_hw_type_to_reg_type(const struct intel_device_info *devinfo, enum brw_reg_file file, unsigned hw_type); unsigned -brw_reg_type_to_a16_hw_3src_type(const struct intel_device_info *devinfo, - enum brw_reg_type type); - -unsigned -brw_reg_type_to_a1_hw_3src_type(const struct intel_device_info *devinfo, - enum brw_reg_type type); +brw_type_encode_for_3src(const struct intel_device_info *devinfo, + enum brw_reg_type type); enum brw_reg_type brw_a16_hw_3src_type_to_reg_type(const struct intel_device_info *devinfo, diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index d17e742c79e..74dcc6025d2 100644 --- a/src/intel/compiler/test_eu_validate.cpp +++ b/src/intel/compiler/test_eu_validate.cpp @@ -366,7 +366,8 @@ TEST_P(validation_test, invalid_type_encoding_3src_a16) for (unsigned i = 0; i < ARRAY_SIZE(test_case); i++) { if (test_case[i].expected_result) { - unsigned hw_type = brw_reg_type_to_a16_hw_3src_type(&devinfo, test_case[i].type); + unsigned hw_type = + brw_type_encode_for_3src(&devinfo, test_case[i].type); if (hw_type != INVALID_HW_REG_TYPE) { /* ... and remove valid encodings from the set */ assert(BITSET_TEST(invalid_encodings, hw_type)); @@ -456,7 +457,8 @@ TEST_P(validation_test, invalid_type_encoding_3src_a1) for (unsigned i = 0; i < ARRAY_SIZE(test_case); i++) { if (test_case[i].expected_result) { - unsigned hw_type = brw_reg_type_to_a1_hw_3src_type(&devinfo, test_case[i].type); + unsigned hw_type = + brw_type_encode_for_3src(&devinfo, test_case[i].type); unsigned hw_exec_type = hw_type | (test_case[i].exec_type << 3); if (hw_type != INVALID_HW_REG_TYPE) { /* ... and remove valid encodings from the set */