From 27e37a77461874c7d41c5268359b281a997326ec Mon Sep 17 00:00:00 2001
From: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Date: Wed, 16 Dec 2020 13:09:50 -0500
Subject: [PATCH] pan/bi: Add pseudo register formats to XML

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8213>
---
 src/panfrost/bifrost/ISA.xml      | 20 ++++++++++++++++++++
 src/panfrost/bifrost/isa_parse.py |  7 +++++--
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/src/panfrost/bifrost/ISA.xml b/src/panfrost/bifrost/ISA.xml
index bdfff876e36..b774a0f5e4f 100644
--- a/src/panfrost/bifrost/ISA.xml
+++ b/src/panfrost/bifrost/ISA.xml
@@ -6314,6 +6314,16 @@
     <src start="0"/>
     <src start="3"/>
     <src start="6" mask="0xf7"/>
+    <mod name="register_format" size="4" pseudo="true">
+      <opt>f16</opt>
+      <opt>f32</opt>
+      <opt>s32</opt>
+      <opt>u32</opt>
+      <opt>s16</opt>
+      <opt>u16</opt>
+      <opt>f64</opt>
+      <opt>i64</opt>
+    </mod>
     <mod name="vecsize" start="9" size="2">
       <opt>none</opt>
       <opt>v2</opt>
@@ -7618,6 +7628,16 @@
     <src start="0"/>
     <src start="3"/>
     <src start="6" mask="0xf7"/>
+    <mod name="register_format" size="4" pseudo="true">
+      <opt>f16</opt>
+      <opt>f32</opt>
+      <opt>s32</opt>
+      <opt>u32</opt>
+      <opt>s16</opt>
+      <opt>u16</opt>
+      <opt>f64</opt>
+      <opt>i64</opt>
+    </mod>
     <mod name="vecsize" start="9" size="2">
       <opt>none</opt>
       <opt>v2</opt>
diff --git a/src/panfrost/bifrost/isa_parse.py b/src/panfrost/bifrost/isa_parse.py
index c05ce55b5f9..8d61341816d 100644
--- a/src/panfrost/bifrost/isa_parse.py
+++ b/src/panfrost/bifrost/isa_parse.py
@@ -55,10 +55,13 @@ def parse_derived(obj):
 
     return out
 
-def parse_modifiers(obj):
+def parse_modifiers(obj, include_pseudo):
     out = []
 
     for mod in obj.findall('mod'):
+        if mod.attrib.get('pseudo', False) and not include_pseudo:
+            continue
+
         name = mod.attrib['name']
         start = mod.attrib.get('start', None)
         size = int(mod.attrib['size'])
@@ -118,7 +121,7 @@ def parse_instruction(ins, include_pseudo):
         common['immediates'].append([imm.attrib['name'], start, int(imm.attrib['size'])])
 
     common['derived'] = parse_derived(ins)
-    common['modifiers'] = parse_modifiers(ins)
+    common['modifiers'] = parse_modifiers(ins, include_pseudo)
 
     for swap in ins.findall('swap'):
         lr = [int(swap.get('left')), int(swap.get('right'))]