diff --git a/src/amd/compiler/aco_insert_waitcnt.cpp b/src/amd/compiler/aco_insert_waitcnt.cpp index 97cf9229255..d1123ea893c 100644 --- a/src/amd/compiler/aco_insert_waitcnt.cpp +++ b/src/amd/compiler/aco_insert_waitcnt.cpp @@ -575,16 +575,6 @@ kill(wait_imm& imm, depctr_wait& depctr, Instruction* instr, wait_ctx& ctx, force_waitcnt(ctx, imm); } - /* sendmsg(dealloc_vgprs) releases scratch, so this isn't safe if there is a in-progress - * scratch store. - */ - if (ctx.gfx_level >= GFX11 && instr->opcode == aco_opcode::s_sendmsg && - instr->salu().imm == sendmsg_dealloc_vgprs) { - barrier_info& bar = ctx.bar[barrier_info_release_dep]; - imm.combine(bar.imm[ffs(storage_scratch) - 1]); - imm.combine(bar.imm[ffs(storage_vgpr_spill) - 1]); - } - check_instr(ctx, imm, instr); if (instr->opcode == aco_opcode::ds_ordered_count && diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp index 0a53afac5c1..d2a208c2fec 100644 --- a/src/amd/compiler/aco_ir.cpp +++ b/src/amd/compiler/aco_ir.cpp @@ -1657,32 +1657,6 @@ depctr_wait::pack() const return imm; } -bool -dealloc_vgprs(Program* program) -{ - if (program->gfx_level < GFX11) - return false; - - /* If we insert the sendmsg on GFX11.5, the export priority workaround will require us to insert - * a wait after exports. There might still be pending VMEM stores for PS parameter exports, - * except NGG lowering usually inserts a memory barrier. This means there is unlikely to be any - * pending VMEM stores or exports if we insert the sendmsg for these stages. */ - if (program->gfx_level == GFX11_5 && (program->stage.hw == AC_HW_NEXT_GEN_GEOMETRY_SHADER || - program->stage.hw == AC_HW_PIXEL_SHADER)) - return false; - - Block& block = program->blocks.back(); - - /* don't bother checking if there is a pending VMEM store or export: there almost always is */ - Builder bld(program); - if (!block.instructions.empty() && block.instructions.back()->opcode == aco_opcode::s_endpgm) { - bld.reset(&block.instructions, block.instructions.begin() + (block.instructions.size() - 1)); - bld.sopp(aco_opcode::s_sendmsg, sendmsg_dealloc_vgprs); - } - - return true; -} - bool Instruction::isTrans() const noexcept { diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h index 92121b2aa42..d970224e599 100644 --- a/src/amd/compiler/aco_ir.h +++ b/src/amd/compiler/aco_ir.h @@ -2440,7 +2440,6 @@ void spill(Program* program); void insert_waitcnt(Program* program); void insert_delay_alu(Program* program); void combine_delay_alu(Program* program); -bool dealloc_vgprs(Program* program); void insert_NOPs(Program* program); void form_hard_clauses(Program* program); unsigned emit_program(Program* program, std::vector& code, diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index 1f16271fa3c..6d472ee9495 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -2273,8 +2273,6 @@ lower_to_hw_instr(Program* program) int end_with_regs_block_index = -1; - bool should_dealloc_vgprs = dealloc_vgprs(program); - for (int block_idx = program->blocks.size() - 1; block_idx >= 0; block_idx--) { Block* block = &program->blocks[block_idx]; lower_context ctx; @@ -2404,9 +2402,6 @@ lower_to_hw_instr(Program* program) instr2->definitions[0].isFixed() && instr2->definitions[0].physReg() == exec) continue; - else if (instr2->opcode == aco_opcode::s_sendmsg && - instr2->salu().imm == sendmsg_dealloc_vgprs) - continue; ignore_early_exit = false; } @@ -2431,12 +2426,6 @@ lower_to_hw_instr(Program* program) block = &program->blocks[block_idx]; ctx.block = block; - /* sendmsg(dealloc_vgprs) releases scratch, so it isn't safe if there is an - * in-progress scratch store. */ - wait_imm wait; - if (should_dealloc_vgprs && uses_scratch(program)) - wait.vs = 0; - bld.reset(discard_block); if (program->has_pops_overlapped_waves_wait && (program->gfx_level >= GFX11 || discard_sends_pops_done)) { @@ -2444,6 +2433,7 @@ lower_to_hw_instr(Program* program) * the waitcnt necessary before resuming overlapping waves as the normal * waitcnt insertion doesn't work in a discard early exit block. */ + wait_imm wait; if (program->gfx_level >= GFX10) wait.vs = 0; wait.vm = 0; @@ -2462,10 +2452,6 @@ lower_to_hw_instr(Program* program) bld.exp(aco_opcode::exp, Operand(v1), Operand(v1), Operand(v1), Operand(v1), 0, target, false, true, true); - wait.build_waitcnt(bld); - if (should_dealloc_vgprs) - bld.sopp(aco_opcode::s_sendmsg, sendmsg_dealloc_vgprs); - bld.sopp(aco_opcode::s_endpgm); bld.reset(&ctx.instructions); diff --git a/src/amd/compiler/tests/test_isel.cpp b/src/amd/compiler/tests/test_isel.cpp index ab6676875b4..4a1bf9f9cf8 100644 --- a/src/amd/compiler/tests/test_isel.cpp +++ b/src/amd/compiler/tests/test_isel.cpp @@ -174,13 +174,9 @@ BEGIN_TEST(isel.discard_early_exit.mrtz) /* On GFX11, the discard early exit must use mrtz if the shader exports only depth. */ //>> exp mrtz v#_, off, off, off done ; $_ $_ - //! s_nop 0 ; $_ - //! s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; $_ //! s_endpgm ; $_ //! BB1: //! exp mrtz off, off, off, off done ; $_ $_ - //! s_nop 0 ; $_ - //! s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; $_ //! s_endpgm ; $_ PipelineBuilder pbld(get_vk_device(GFX11)); @@ -203,13 +199,9 @@ BEGIN_TEST(isel.discard_early_exit.mrt0) /* On GFX11, the discard early exit must use mrt0 if the shader exports color. */ //>> exp mrt0 v#x, v#x, v#x, v#x done ; $_ $_ - //! s_nop 0 ; $_ - //! s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; $_ //! s_endpgm ; $_ //! BB1: //! exp mrt0 off, off, off, off done ; $_ $_ - //! s_nop 0 ; $_ - //! s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; $_ //! s_endpgm ; $_ PipelineBuilder pbld(get_vk_device(GFX11)); diff --git a/src/amd/compiler/tests/test_to_hw_instr.cpp b/src/amd/compiler/tests/test_to_hw_instr.cpp index c638016198b..17e83fe2295 100644 --- a/src/amd/compiler/tests/test_to_hw_instr.cpp +++ b/src/amd/compiler/tests/test_to_hw_instr.cpp @@ -218,7 +218,6 @@ BEGIN_TEST(to_hw_instr.swap_subdword) bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_lo, v1b), Definition(v0_hi, v1b), Operand(v0_hi, v1b), Operand(v0_lo, v1b)); - //~gfx11! s_sendmsg sendmsg(dealloc_vgprs) //! s_endpgm finish_to_hw_instr_test(); @@ -369,7 +368,6 @@ BEGIN_TEST(to_hw_instr.subdword_constant) bld.pseudo(aco_opcode::p_unit_test, Operand::c32(17u)); bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_lo, v1b), Operand::zero(1)); - //~gfx11! s_sendmsg sendmsg(dealloc_vgprs) //! s_endpgm finish_to_hw_instr_test(); @@ -500,7 +498,6 @@ BEGIN_TEST(to_hw_instr.extract) finish_to_hw_instr_test(); - //~gfx11_.*! s_sendmsg sendmsg(dealloc_vgprs) //! s_endpgm } } @@ -618,7 +615,6 @@ BEGIN_TEST(to_hw_instr.insert) finish_to_hw_instr_test(); - //~gfx11! s_sendmsg sendmsg(dealloc_vgprs) //! s_endpgm } END_TEST @@ -838,7 +834,6 @@ BEGIN_TEST(to_hw_instr.pack2x16_constant) bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_lo, v2b), Definition(v0_hi, v2b), Operand(v1_lo, v2b), Operand::c16(0x00f0)); - //~gfx11! s_sendmsg sendmsg(dealloc_vgprs) //! s_endpgm finish_to_hw_instr_test(); @@ -855,7 +850,6 @@ BEGIN_TEST(to_hw_instr.mov_b16_sgpr_src) bld.pseudo(aco_opcode::p_extract_vector, Definition(PhysReg(256), v2b), Operand(PhysReg(0), s1), Operand::c32(1)); - //! s_sendmsg sendmsg(dealloc_vgprs) //! s_endpgm finish_to_hw_instr_test();