diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc
index 8e271778a12..bff62c6b9d3 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.cc
+++ b/src/freedreno/vulkan/tu_cmd_buffer.cc
@@ -1528,7 +1528,9 @@ tu6_init_static_regs(struct tu_device *dev, struct tu_cs *cs)
tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9602, 0);
tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9E72, 0);
tu_cs_emit_regs(cs, A6XX_SP_TP_MODE_CNTL(.isammode = ISAMMODE_GL,
- .texcoordroundmode = COORD_TRUNCATE,
+ .texcoordroundmode = dev->instance->use_tex_coord_round_nearest_even_mode
+ ? COORD_ROUND_NEAREST_EVEN
+ : COORD_TRUNCATE,
.nearestmipsnap = CLAMP_ROUND_TRUNCATE,
.destdatatypeoverride = true));
tu_cs_emit_regs(cs, HLSQ_CONTROL_5_REG(CHIP, .dword = 0xfc));
diff --git a/src/freedreno/vulkan/tu_device.cc b/src/freedreno/vulkan/tu_device.cc
index 9fdcf803159..cad7ab2dbcf 100644
--- a/src/freedreno/vulkan/tu_device.cc
+++ b/src/freedreno/vulkan/tu_device.cc
@@ -1635,6 +1635,7 @@ static const driOptionDescription tu_dri_options[] = {
DRI_CONF_TU_DONT_RESERVE_DESCRIPTOR_SET(false)
DRI_CONF_TU_ALLOW_OOB_INDIRECT_UBO_LOADS(false)
DRI_CONF_TU_DISABLE_D24S8_BORDER_COLOR_WORKAROUND(false)
+ DRI_CONF_TU_USE_TEX_COORD_ROUND_NEAREST_EVEN_MODE(false)
DRI_CONF_SECTION_END
};
@@ -1657,6 +1658,8 @@ tu_init_dri_options(struct tu_instance *instance)
driQueryOptionb(&instance->dri_options, "tu_allow_oob_indirect_ubo_loads");
instance->disable_d24s8_border_color_workaround =
driQueryOptionb(&instance->dri_options, "tu_disable_d24s8_border_color_workaround");
+ instance->use_tex_coord_round_nearest_even_mode =
+ driQueryOptionb(&instance->dri_options, "tu_use_tex_coord_round_nearest_even_mode");
}
static uint32_t instance_count = 0;
diff --git a/src/freedreno/vulkan/tu_device.h b/src/freedreno/vulkan/tu_device.h
index fc9b898eea0..25b32d3e66a 100644
--- a/src/freedreno/vulkan/tu_device.h
+++ b/src/freedreno/vulkan/tu_device.h
@@ -204,6 +204,9 @@ struct tu_instance
* UBWC to be enabled.
*/
bool disable_d24s8_border_color_workaround;
+
+ /* D3D emulation requires texture coordinates to be rounded to nearest even value. */
+ bool use_tex_coord_round_nearest_even_mode;
};
VK_DEFINE_HANDLE_CASTS(tu_instance, vk.base, VkInstance,
VK_OBJECT_TYPE_INSTANCE)
diff --git a/src/util/00-mesa-defaults.conf b/src/util/00-mesa-defaults.conf
index aefd034283f..082add17d58 100644
--- a/src/util/00-mesa-defaults.conf
+++ b/src/util/00-mesa-defaults.conf
@@ -1245,6 +1245,12 @@ TODO: document the other workarounds.
to ignore this edge case and force UBWC to be enabled.
-->
+
+
diff --git a/src/util/driconf.h b/src/util/driconf.h
index a15392b97d2..1e29bdf7424 100644
--- a/src/util/driconf.h
+++ b/src/util/driconf.h
@@ -641,6 +641,10 @@
DRI_CONF_OPT_B(tu_disable_d24s8_border_color_workaround, def, \
"Use UBWC for D24S8 images with VK_IMAGE_USAGE_SAMPLED_BIT when customBorderColorWithoutFormat is enabled")
+#define DRI_CONF_TU_USE_TEX_COORD_ROUND_NEAREST_EVEN_MODE(def) \
+ DRI_CONF_OPT_B(tu_use_tex_coord_round_nearest_even_mode, def, \
+ "Use D3D-compliant round-to-nearest-even mode for texture coordinates")
+
/**
* \brief Honeykrisp specific configuration options
*/