From 23c49ede5745eff71c03462b9bd966f1c370c65e Mon Sep 17 00:00:00 2001 From: Job Noorman Date: Wed, 13 Aug 2025 19:37:47 +0200 Subject: [PATCH] ir3: use isam for txf with LOD 0 isaml with LOD 0 is equivalent to isam. Use isam if possible because it needs one less src register. Totals: Instrs: 49141575 -> 49109622 (-0.07%); split: -0.07%, +0.00% CodeSize: 102938312 -> 102865138 (-0.07%) NOPs: 8464238 -> 8463245 (-0.01%); split: -0.02%, +0.01% (ss)-stall: 4013710 -> 4014037 (+0.01%); split: -0.00%, +0.01% (sy)-stall: 16712850 -> 16712860 (+0.00%) Preamble Instrs: 11120034 -> 11119863 (-0.00%) Last helper: 11942609 -> 11934226 (-0.07%); split: -0.07%, +0.00% Cat0: 9320007 -> 9319014 (-0.01%); split: -0.02%, +0.01% Cat7: 1636810 -> 1605850 (-1.89%) Totals from 9523 (5.78% of 164705) affected shaders: Instrs: 7755614 -> 7723661 (-0.41%); split: -0.41%, +0.00% CodeSize: 15214510 -> 15141336 (-0.48%) NOPs: 1722109 -> 1721116 (-0.06%); split: -0.11%, +0.05% (ss)-stall: 807953 -> 808280 (+0.04%); split: -0.00%, +0.04% (sy)-stall: 3054163 -> 3054173 (+0.00%) Preamble Instrs: 1653169 -> 1652998 (-0.01%) Last helper: 2333301 -> 2324918 (-0.36%); split: -0.36%, +0.00% Cat0: 1888236 -> 1887243 (-0.05%); split: -0.10%, +0.05% Cat7: 276671 -> 245711 (-11.19%) Signed-off-by: Job Noorman Part-of: --- src/freedreno/ir3/ir3_compiler_nir.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 1a95812002f..eef0c7d7fa5 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -3591,6 +3591,7 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) struct ir3_instruction *lod, *compare, *proj, *sample_index; struct tex_src_info info = {0}; bool has_bias = false, has_lod = false, has_proj = false, has_off = false; + bool lod_zero = false; unsigned i, coords, flags, ncomp; unsigned nsrc0 = 0, nsrc1 = 0; type_t type; @@ -3615,6 +3616,8 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) case nir_tex_src_lod: lod = ir3_get_src(ctx, &tex->src[i].src)[0]; has_lod = true; + lod_zero = nir_src_is_const(tex->src[i].src) && + nir_src_as_uint(tex->src[i].src) == 0; break; case nir_tex_src_comparator: /* shadow comparator */ compare = ir3_get_src(ctx, &tex->src[i].src)[0]; @@ -3683,7 +3686,11 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) opc = OPC_SAMGQ; break; case nir_texop_txf: - opc = OPC_ISAML; + /* isaml with LOD 0 is equivalent to isam. Use isam if possible because it + * needs one less src register. + */ + opc = lod_zero ? OPC_ISAM : OPC_ISAML; + has_lod = !lod_zero; break; case nir_texop_lod: opc = OPC_GETLOD;