From 231ede4f0ca92b33da8b16e7921af9877379c7d1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Thu, 11 Jan 2024 17:51:17 +0200 Subject: [PATCH] iris: replace constant cache invalidate with hdc flush MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This implements Wa_14010840176. Cc: mesa-stable Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- src/gallium/drivers/iris/iris_state.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 24580f3bcdf..07f2dec7a32 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -9632,6 +9632,22 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, PIPE_CONTROL_CS_STALL, NULL, 0, 0); } + batch_mark_sync_for_pipe_control(batch, flags); + +#if INTEL_NEEDS_WA_14010840176 + /* "If the intention of “constant cache invalidate” is + * to invalidate the L1 cache (which can cache constants), use “HDC + * pipeline flush” instead of Constant Cache invalidate command." + * + * "If L3 invalidate is needed, the w/a should be to set state invalidate + * in the pipe control command, in addition to the HDC pipeline flush." + */ + if (flags & PIPE_CONTROL_CONST_CACHE_INVALIDATE) { + flags &= ~PIPE_CONTROL_CONST_CACHE_INVALIDATE; + flags |= PIPE_CONTROL_FLUSH_HDC | PIPE_CONTROL_STATE_CACHE_INVALIDATE; + } +#endif + /* Emit --------------------------------------------------------------- */ if (INTEL_DEBUG(DEBUG_PIPE_CONTROL)) { @@ -9667,7 +9683,6 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, imm, reason); } - batch_mark_sync_for_pipe_control(batch, flags); iris_batch_sync_region_start(batch); const bool trace_pc =