diff --git a/src/intel/compiler/brw_asm.c b/src/intel/compiler/brw_asm.c index 4c6c8b38b49..f025f3e44ad 100644 --- a/src/intel/compiler/brw_asm.c +++ b/src/intel/compiler/brw_asm.c @@ -35,7 +35,7 @@ i965_postprocess_labels() int relative_offset = (tlabel->offset - ilabel->offset) / sizeof(brw_eu_inst); relative_offset *= to_bytes_scale; - unsigned opcode = brw_inst_opcode(p->isa, inst); + unsigned opcode = brw_eu_inst_opcode(p->isa, inst); if (ilabel->type == INSTR_LABEL_JIP) { switch (opcode) { @@ -43,12 +43,12 @@ i965_postprocess_labels() case BRW_OPCODE_ELSE: case BRW_OPCODE_ENDIF: case BRW_OPCODE_WHILE: - brw_inst_set_jip(p->devinfo, inst, relative_offset); + brw_eu_inst_set_jip(p->devinfo, inst, relative_offset); break; case BRW_OPCODE_BREAK: case BRW_OPCODE_HALT: case BRW_OPCODE_CONTINUE: - brw_inst_set_jip(p->devinfo, inst, relative_offset); + brw_eu_inst_set_jip(p->devinfo, inst, relative_offset); break; default: fprintf(stderr, "Unknown opcode %d with JIP label\n", opcode); @@ -58,7 +58,7 @@ i965_postprocess_labels() switch (opcode) { case BRW_OPCODE_IF: case BRW_OPCODE_ELSE: - brw_inst_set_uip(p->devinfo, inst, relative_offset); + brw_eu_inst_set_uip(p->devinfo, inst, relative_offset); break; case BRW_OPCODE_WHILE: case BRW_OPCODE_ENDIF: @@ -67,7 +67,7 @@ i965_postprocess_labels() case BRW_OPCODE_BREAK: case BRW_OPCODE_CONTINUE: case BRW_OPCODE_HALT: - brw_inst_set_uip(p->devinfo, inst, relative_offset); + brw_eu_inst_set_uip(p->devinfo, inst, relative_offset); break; default: fprintf(stderr, "Unknown opcode %d with UIP label\n", opcode); @@ -144,7 +144,7 @@ brw_assemble(void *mem_ctx, const struct intel_device_info *devinfo, int compacted = 0; for (int i = 0; i < result.inst_count; i++) { const brw_eu_inst *inst = result.bin + i; - if (brw_inst_cmpt_control(devinfo, inst)) + if (brw_eu_inst_cmpt_control(devinfo, inst)) compacted++; } result.bin_size -= compacted * 8; diff --git a/src/intel/compiler/brw_asm_tool.c b/src/intel/compiler/brw_asm_tool.c index ee013052ea9..36e9e79e7d4 100644 --- a/src/intel/compiler/brw_asm_tool.c +++ b/src/intel/compiler/brw_asm_tool.c @@ -241,7 +241,7 @@ int main(int argc, char **argv) const brw_eu_inst *insn = r.bin + offset; bool compacted = false; - if (compact && brw_inst_cmpt_control(devinfo, insn)) { + if (compact && brw_eu_inst_cmpt_control(devinfo, insn)) { offset += 8; compacted = true; } else { diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 539f6042dec..03b26c941c4 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -872,73 +872,73 @@ static int dest(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; - enum brw_reg_type type = brw_inst_dst_type(devinfo, inst); + enum brw_reg_type type = brw_eu_inst_dst_type(devinfo, inst); unsigned elem_size = brw_type_size_bytes(type); int err = 0; - if (is_split_send(devinfo, brw_inst_opcode(isa, inst))) { + if (is_split_send(devinfo, brw_eu_inst_opcode(isa, inst))) { /* These are fixed for split sends */ type = BRW_TYPE_UD; elem_size = 4; if (devinfo->ver >= 12) { - err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst), - brw_inst_dst_da_reg_nr(devinfo, inst)); + err |= reg(file, brw_eu_inst_send_dst_reg_file(devinfo, inst), + brw_eu_inst_dst_da_reg_nr(devinfo, inst)); string(file, brw_reg_type_to_letters(type)); - } else if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { - err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst), - brw_inst_dst_da_reg_nr(devinfo, inst)); - unsigned subreg_nr = brw_inst_dst_da16_subreg_nr(devinfo, inst); + } else if (brw_eu_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + err |= reg(file, brw_eu_inst_send_dst_reg_file(devinfo, inst), + brw_eu_inst_dst_da_reg_nr(devinfo, inst)); + unsigned subreg_nr = brw_eu_inst_dst_da16_subreg_nr(devinfo, inst); if (subreg_nr) format(file, ".%u", subreg_nr); string(file, brw_reg_type_to_letters(type)); } else { string(file, "g[a0"); - if (brw_inst_dst_ia_subreg_nr(devinfo, inst)) - format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) / + if (brw_eu_inst_dst_ia_subreg_nr(devinfo, inst)) + format(file, ".%"PRIu64, brw_eu_inst_dst_ia_subreg_nr(devinfo, inst) / elem_size); - if (brw_inst_send_dst_ia16_addr_imm(devinfo, inst)) - format(file, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo, inst)); + if (brw_eu_inst_send_dst_ia16_addr_imm(devinfo, inst)) + format(file, " %d", brw_eu_inst_send_dst_ia16_addr_imm(devinfo, inst)); string(file, "]<"); string(file, brw_reg_type_to_letters(type)); } - } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { - err |= reg(file, brw_inst_dst_reg_file(devinfo, inst), - brw_inst_dst_da_reg_nr(devinfo, inst)); + } else if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + if (brw_eu_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + err |= reg(file, brw_eu_inst_dst_reg_file(devinfo, inst), + brw_eu_inst_dst_da_reg_nr(devinfo, inst)); if (err == -1) return 0; - if (brw_inst_dst_da1_subreg_nr(devinfo, inst)) - format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) / + if (brw_eu_inst_dst_da1_subreg_nr(devinfo, inst)) + format(file, ".%"PRIu64, brw_eu_inst_dst_da1_subreg_nr(devinfo, inst) / elem_size); string(file, "<"); err |= control(file, "horiz stride", horiz_stride, - brw_inst_dst_hstride(devinfo, inst), NULL); + brw_eu_inst_dst_hstride(devinfo, inst), NULL); string(file, ">"); string(file, brw_reg_type_to_letters(type)); } else { string(file, "g[a0"); - if (brw_inst_dst_ia_subreg_nr(devinfo, inst)) - format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) / + if (brw_eu_inst_dst_ia_subreg_nr(devinfo, inst)) + format(file, ".%"PRIu64, brw_eu_inst_dst_ia_subreg_nr(devinfo, inst) / elem_size); - if (brw_inst_dst_ia1_addr_imm(devinfo, inst)) - format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst)); + if (brw_eu_inst_dst_ia1_addr_imm(devinfo, inst)) + format(file, " %d", brw_eu_inst_dst_ia1_addr_imm(devinfo, inst)); string(file, "]<"); err |= control(file, "horiz stride", horiz_stride, - brw_inst_dst_hstride(devinfo, inst), NULL); + brw_eu_inst_dst_hstride(devinfo, inst), NULL); string(file, ">"); string(file, brw_reg_type_to_letters(type)); } } else { - if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { - err |= reg(file, brw_inst_dst_reg_file(devinfo, inst), - brw_inst_dst_da_reg_nr(devinfo, inst)); + if (brw_eu_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + err |= reg(file, brw_eu_inst_dst_reg_file(devinfo, inst), + brw_eu_inst_dst_da_reg_nr(devinfo, inst)); if (err == -1) return 0; - if (brw_inst_dst_da16_subreg_nr(devinfo, inst)) + if (brw_eu_inst_dst_da16_subreg_nr(devinfo, inst)) format(file, ".%u", 16 / elem_size); string(file, "<1>"); err |= control(file, "writemask", writemask, - brw_inst_da16_writemask(devinfo, inst), NULL); + brw_eu_inst_da16_writemask(devinfo, inst), NULL); string(file, brw_reg_type_to_letters(type)); } else { err = 1; @@ -953,7 +953,7 @@ static int dest_3src(FILE *file, const struct intel_device_info *devinfo, const brw_eu_inst *inst) { - bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; + bool is_align1 = brw_eu_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; int err = 0; uint32_t reg_file; unsigned subreg_nr; @@ -963,22 +963,22 @@ dest_3src(FILE *file, const struct intel_device_info *devinfo, return 0; if (devinfo->ver >= 12) - reg_file = brw_inst_3src_a1_dst_reg_file(devinfo, inst); - else if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst)) + reg_file = brw_eu_inst_3src_a1_dst_reg_file(devinfo, inst); + else if (is_align1 && brw_eu_inst_3src_a1_dst_reg_file(devinfo, inst)) reg_file = ARF; else reg_file = FIXED_GRF; - err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst)); + err |= reg(file, reg_file, brw_eu_inst_3src_dst_reg_nr(devinfo, inst)); if (err == -1) return 0; if (is_align1) { - type = brw_inst_3src_a1_dst_type(devinfo, inst); - subreg_nr = brw_inst_3src_a1_dst_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a1_dst_type(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a1_dst_subreg_nr(devinfo, inst); } else { - type = brw_inst_3src_a16_dst_type(devinfo, inst); - subreg_nr = brw_inst_3src_a16_dst_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a16_dst_type(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a16_dst_subreg_nr(devinfo, inst); } subreg_nr /= brw_type_size_bytes(type); @@ -988,7 +988,7 @@ dest_3src(FILE *file, const struct intel_device_info *devinfo, if (!is_align1) { err |= control(file, "writemask", writemask, - brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL); + brw_eu_inst_3src_a16_dst_writemask(devinfo, inst), NULL); } string(file, brw_reg_type_to_letters(type)); @@ -999,13 +999,13 @@ static int dest_dpas_3src(FILE *file, const struct intel_device_info *devinfo, const brw_eu_inst *inst) { - uint32_t reg_file = brw_inst_dpas_3src_dst_reg_file(devinfo, inst); + uint32_t reg_file = brw_eu_inst_dpas_3src_dst_reg_file(devinfo, inst); - if (reg(file, reg_file, brw_inst_dpas_3src_dst_reg_nr(devinfo, inst)) == -1) + if (reg(file, reg_file, brw_eu_inst_dpas_3src_dst_reg_nr(devinfo, inst)) == -1) return 0; - enum brw_reg_type type = brw_inst_dpas_3src_dst_type(devinfo, inst); - unsigned subreg_nr = brw_inst_dpas_3src_dst_subreg_nr(devinfo, inst); + enum brw_reg_type type = brw_eu_inst_dpas_3src_dst_type(devinfo, inst); + unsigned subreg_nr = brw_eu_inst_dpas_3src_dst_subreg_nr(devinfo, inst); if (subreg_nr) format(file, ".%u", subreg_nr); @@ -1253,16 +1253,16 @@ src0_3src(FILE *file, const struct intel_device_info *devinfo, enum brw_width _width; enum brw_horizontal_stride _horiz_stride; bool is_scalar_region; - bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; + bool is_align1 = brw_eu_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; if (devinfo->ver < 10 && is_align1) return 0; if (is_align1) { - _file = brw_inst_3src_a1_src0_reg_file(devinfo, inst); + _file = brw_eu_inst_3src_a1_src0_reg_file(devinfo, inst); if (_file == IMM) { - uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst); - enum brw_reg_type type = brw_inst_3src_a1_src0_type(devinfo, inst); + uint16_t imm_val = brw_eu_inst_3src_a1_src0_imm(devinfo, inst); + enum brw_reg_type type = brw_eu_inst_3src_a1_src0_type(devinfo, inst); if (type == BRW_TYPE_W) { format(file, "%dW", imm_val); @@ -1274,21 +1274,21 @@ src0_3src(FILE *file, const struct intel_device_info *devinfo, return 0; } - reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst); - subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst); - type = brw_inst_3src_a1_src0_type(devinfo, inst); + reg_nr = brw_eu_inst_3src_src0_reg_nr(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a1_src0_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a1_src0_type(devinfo, inst); _vert_stride = vstride_from_align1_3src_vstride( - devinfo, brw_inst_3src_a1_src0_vstride(devinfo, inst)); + devinfo, brw_eu_inst_3src_a1_src0_vstride(devinfo, inst)); _horiz_stride = hstride_from_align1_3src_hstride( - brw_inst_3src_a1_src0_hstride(devinfo, inst)); + brw_eu_inst_3src_a1_src0_hstride(devinfo, inst)); _width = implied_width(_vert_stride, _horiz_stride); } else { _file = FIXED_GRF; - reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst); - subreg_nr = brw_inst_3src_a16_src0_subreg_nr(devinfo, inst); - type = brw_inst_3src_a16_src_type(devinfo, inst); + reg_nr = brw_eu_inst_3src_src0_reg_nr(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a16_src0_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a16_src_type(devinfo, inst); - if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) { + if (brw_eu_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) { _vert_stride = BRW_VERTICAL_STRIDE_0; _width = BRW_WIDTH_1; _horiz_stride = BRW_HORIZONTAL_STRIDE_0; @@ -1305,8 +1305,8 @@ src0_3src(FILE *file, const struct intel_device_info *devinfo, subreg_nr /= brw_type_size_bytes(type); err |= control(file, "negate", m_negate, - brw_inst_3src_src0_negate(devinfo, inst), NULL); - err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL); + brw_eu_inst_3src_src0_negate(devinfo, inst), NULL); + err |= control(file, "abs", _abs, brw_eu_inst_3src_src0_abs(devinfo, inst), NULL); err |= reg(file, _file, reg_nr); if (err == -1) @@ -1315,7 +1315,7 @@ src0_3src(FILE *file, const struct intel_device_info *devinfo, format(file, ".%d", subreg_nr); src_align1_region(file, _vert_stride, _width, _horiz_stride); if (!is_scalar_region && !is_align1) - err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst)); + err |= src_swizzle(file, brw_eu_inst_3src_a16_src0_swizzle(devinfo, inst)); string(file, brw_reg_type_to_letters(type)); return err; } @@ -1332,29 +1332,29 @@ src1_3src(FILE *file, const struct intel_device_info *devinfo, enum brw_width _width; enum brw_horizontal_stride _horiz_stride; bool is_scalar_region; - bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; + bool is_align1 = brw_eu_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; if (devinfo->ver < 10 && is_align1) return 0; if (is_align1) { - _file = brw_inst_3src_a1_src1_reg_file(devinfo, inst); - reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst); - subreg_nr = brw_inst_3src_a1_src1_subreg_nr(devinfo, inst); - type = brw_inst_3src_a1_src1_type(devinfo, inst); + _file = brw_eu_inst_3src_a1_src1_reg_file(devinfo, inst); + reg_nr = brw_eu_inst_3src_src1_reg_nr(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a1_src1_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a1_src1_type(devinfo, inst); _vert_stride = vstride_from_align1_3src_vstride( - devinfo, brw_inst_3src_a1_src1_vstride(devinfo, inst)); + devinfo, brw_eu_inst_3src_a1_src1_vstride(devinfo, inst)); _horiz_stride = hstride_from_align1_3src_hstride( - brw_inst_3src_a1_src1_hstride(devinfo, inst)); + brw_eu_inst_3src_a1_src1_hstride(devinfo, inst)); _width = implied_width(_vert_stride, _horiz_stride); } else { _file = FIXED_GRF; - reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst); - subreg_nr = brw_inst_3src_a16_src1_subreg_nr(devinfo, inst); - type = brw_inst_3src_a16_src_type(devinfo, inst); + reg_nr = brw_eu_inst_3src_src1_reg_nr(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a16_src1_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a16_src_type(devinfo, inst); - if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) { + if (brw_eu_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) { _vert_stride = BRW_VERTICAL_STRIDE_0; _width = BRW_WIDTH_1; _horiz_stride = BRW_HORIZONTAL_STRIDE_0; @@ -1371,8 +1371,8 @@ src1_3src(FILE *file, const struct intel_device_info *devinfo, subreg_nr /= brw_type_size_bytes(type); err |= control(file, "negate", m_negate, - brw_inst_3src_src1_negate(devinfo, inst), NULL); - err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL); + brw_eu_inst_3src_src1_negate(devinfo, inst), NULL); + err |= control(file, "abs", _abs, brw_eu_inst_3src_src1_abs(devinfo, inst), NULL); err |= reg(file, _file, reg_nr); if (err == -1) @@ -1381,7 +1381,7 @@ src1_3src(FILE *file, const struct intel_device_info *devinfo, format(file, ".%d", subreg_nr); src_align1_region(file, _vert_stride, _width, _horiz_stride); if (!is_scalar_region && !is_align1) - err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst)); + err |= src_swizzle(file, brw_eu_inst_3src_a16_src1_swizzle(devinfo, inst)); string(file, brw_reg_type_to_letters(type)); return err; } @@ -1398,16 +1398,16 @@ src2_3src(FILE *file, const struct intel_device_info *devinfo, enum brw_width _width; enum brw_horizontal_stride _horiz_stride; bool is_scalar_region; - bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; + bool is_align1 = brw_eu_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; if (devinfo->ver < 10 && is_align1) return 0; if (is_align1) { - _file = brw_inst_3src_a1_src2_reg_file(devinfo, inst); + _file = brw_eu_inst_3src_a1_src2_reg_file(devinfo, inst); if (_file == IMM) { - uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst); - enum brw_reg_type type = brw_inst_3src_a1_src2_type(devinfo, inst); + uint16_t imm_val = brw_eu_inst_3src_a1_src2_imm(devinfo, inst); + enum brw_reg_type type = brw_eu_inst_3src_a1_src2_type(devinfo, inst); if (type == BRW_TYPE_W) { format(file, "%dW", imm_val); @@ -1419,25 +1419,25 @@ src2_3src(FILE *file, const struct intel_device_info *devinfo, return 0; } - reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst); - subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst); - type = brw_inst_3src_a1_src2_type(devinfo, inst); + reg_nr = brw_eu_inst_3src_src2_reg_nr(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a1_src2_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a1_src2_type(devinfo, inst); /* FINISHME: No vertical stride on src2. Is using the hstride in place * correct? Doesn't seem like it, since there's hstride=1 but * no vstride=1. */ _vert_stride = vstride_from_align1_3src_hstride( - brw_inst_3src_a1_src2_hstride(devinfo, inst)); + brw_eu_inst_3src_a1_src2_hstride(devinfo, inst)); _horiz_stride = hstride_from_align1_3src_hstride( - brw_inst_3src_a1_src2_hstride(devinfo, inst)); + brw_eu_inst_3src_a1_src2_hstride(devinfo, inst)); _width = implied_width(_vert_stride, _horiz_stride); } else { _file = FIXED_GRF; - reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst); - subreg_nr = brw_inst_3src_a16_src2_subreg_nr(devinfo, inst); - type = brw_inst_3src_a16_src_type(devinfo, inst); + reg_nr = brw_eu_inst_3src_src2_reg_nr(devinfo, inst); + subreg_nr = brw_eu_inst_3src_a16_src2_subreg_nr(devinfo, inst); + type = brw_eu_inst_3src_a16_src_type(devinfo, inst); - if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) { + if (brw_eu_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) { _vert_stride = BRW_VERTICAL_STRIDE_0; _width = BRW_WIDTH_1; _horiz_stride = BRW_HORIZONTAL_STRIDE_0; @@ -1454,8 +1454,8 @@ src2_3src(FILE *file, const struct intel_device_info *devinfo, subreg_nr /= brw_type_size_bytes(type); err |= control(file, "negate", m_negate, - brw_inst_3src_src2_negate(devinfo, inst), NULL); - err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL); + brw_eu_inst_3src_src2_negate(devinfo, inst), NULL); + err |= control(file, "abs", _abs, brw_eu_inst_3src_src2_abs(devinfo, inst), NULL); err |= reg(file, _file, reg_nr); if (err == -1) @@ -1464,7 +1464,7 @@ src2_3src(FILE *file, const struct intel_device_info *devinfo, format(file, ".%d", subreg_nr); src_align1_region(file, _vert_stride, _width, _horiz_stride); if (!is_scalar_region && !is_align1) - err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst)); + err |= src_swizzle(file, brw_eu_inst_3src_a16_src2_swizzle(devinfo, inst)); string(file, brw_reg_type_to_letters(type)); return err; } @@ -1473,13 +1473,13 @@ static int src0_dpas_3src(FILE *file, const struct intel_device_info *devinfo, const brw_eu_inst *inst) { - uint32_t reg_file = brw_inst_dpas_3src_src0_reg_file(devinfo, inst); + uint32_t reg_file = brw_eu_inst_dpas_3src_src0_reg_file(devinfo, inst); - if (reg(file, reg_file, brw_inst_dpas_3src_src0_reg_nr(devinfo, inst)) == -1) + if (reg(file, reg_file, brw_eu_inst_dpas_3src_src0_reg_nr(devinfo, inst)) == -1) return 0; - unsigned subreg_nr = brw_inst_dpas_3src_src0_subreg_nr(devinfo, inst); - enum brw_reg_type type = brw_inst_dpas_3src_src0_type(devinfo, inst); + unsigned subreg_nr = brw_eu_inst_dpas_3src_src0_subreg_nr(devinfo, inst); + enum brw_reg_type type = brw_eu_inst_dpas_3src_src0_type(devinfo, inst); if (subreg_nr) format(file, ".%d", subreg_nr); @@ -1497,13 +1497,13 @@ static int src1_dpas_3src(FILE *file, const struct intel_device_info *devinfo, const brw_eu_inst *inst) { - uint32_t reg_file = brw_inst_dpas_3src_src1_reg_file(devinfo, inst); + uint32_t reg_file = brw_eu_inst_dpas_3src_src1_reg_file(devinfo, inst); - if (reg(file, reg_file, brw_inst_dpas_3src_src1_reg_nr(devinfo, inst)) == -1) + if (reg(file, reg_file, brw_eu_inst_dpas_3src_src1_reg_nr(devinfo, inst)) == -1) return 0; - unsigned subreg_nr = brw_inst_dpas_3src_src1_subreg_nr(devinfo, inst); - enum brw_reg_type type = brw_inst_dpas_3src_src1_type(devinfo, inst); + unsigned subreg_nr = brw_eu_inst_dpas_3src_src1_subreg_nr(devinfo, inst); + enum brw_reg_type type = brw_eu_inst_dpas_3src_src1_type(devinfo, inst); if (subreg_nr) format(file, ".%d", subreg_nr); @@ -1521,13 +1521,13 @@ static int src2_dpas_3src(FILE *file, const struct intel_device_info *devinfo, const brw_eu_inst *inst) { - uint32_t reg_file = brw_inst_dpas_3src_src2_reg_file(devinfo, inst); + uint32_t reg_file = brw_eu_inst_dpas_3src_src2_reg_file(devinfo, inst); - if (reg(file, reg_file, brw_inst_dpas_3src_src2_reg_nr(devinfo, inst)) == -1) + if (reg(file, reg_file, brw_eu_inst_dpas_3src_src2_reg_nr(devinfo, inst)) == -1) return 0; - unsigned subreg_nr = brw_inst_dpas_3src_src2_subreg_nr(devinfo, inst); - enum brw_reg_type type = brw_inst_dpas_3src_src2_type(devinfo, inst); + unsigned subreg_nr = brw_eu_inst_dpas_3src_src2_subreg_nr(devinfo, inst); + enum brw_reg_type type = brw_eu_inst_dpas_3src_src2_type(devinfo, inst); if (subreg_nr) format(file, ".%d", subreg_nr); @@ -1549,37 +1549,37 @@ imm(FILE *file, const struct brw_isa_info *isa, enum brw_reg_type type, switch (type) { case BRW_TYPE_UQ: - format(file, "0x%016"PRIx64"UQ", brw_inst_imm_uq(devinfo, inst)); + format(file, "0x%016"PRIx64"UQ", brw_eu_inst_imm_uq(devinfo, inst)); break; case BRW_TYPE_Q: - format(file, "0x%016"PRIx64"Q", brw_inst_imm_uq(devinfo, inst)); + format(file, "0x%016"PRIx64"Q", brw_eu_inst_imm_uq(devinfo, inst)); break; case BRW_TYPE_UD: - format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst)); + format(file, "0x%08xUD", brw_eu_inst_imm_ud(devinfo, inst)); break; case BRW_TYPE_D: - format(file, "%dD", brw_inst_imm_d(devinfo, inst)); + format(file, "%dD", brw_eu_inst_imm_d(devinfo, inst)); break; case BRW_TYPE_UW: - format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst)); + format(file, "0x%04xUW", (uint16_t) brw_eu_inst_imm_ud(devinfo, inst)); break; case BRW_TYPE_W: - format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst)); + format(file, "%dW", (int16_t) brw_eu_inst_imm_d(devinfo, inst)); break; case BRW_TYPE_UV: - format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst)); + format(file, "0x%08xUV", brw_eu_inst_imm_ud(devinfo, inst)); break; case BRW_TYPE_VF: format(file, "0x%"PRIx64"VF", brw_eu_inst_bits(inst, 127, 96)); pad(file, 48); format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */", - brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)), - brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8), - brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16), - brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24)); + brw_vf_to_float(brw_eu_inst_imm_ud(devinfo, inst)), + brw_vf_to_float(brw_eu_inst_imm_ud(devinfo, inst) >> 8), + brw_vf_to_float(brw_eu_inst_imm_ud(devinfo, inst) >> 16), + brw_vf_to_float(brw_eu_inst_imm_ud(devinfo, inst) >> 24)); break; case BRW_TYPE_V: - format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst)); + format(file, "0x%08xV", brw_eu_inst_imm_ud(devinfo, inst)); break; case BRW_TYPE_F: /* The DIM instruction's src0 uses an F type but contains a @@ -1587,19 +1587,19 @@ imm(FILE *file, const struct brw_isa_info *isa, enum brw_reg_type type, */ format(file, "0x%"PRIx64"F", brw_eu_inst_bits(inst, 127, 96)); pad(file, 48); - format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst)); + format(file, " /* %-gF */", brw_eu_inst_imm_f(devinfo, inst)); break; case BRW_TYPE_DF: - format(file, "0x%016"PRIx64"DF", brw_inst_imm_uq(devinfo, inst)); + format(file, "0x%016"PRIx64"DF", brw_eu_inst_imm_uq(devinfo, inst)); pad(file, 48); - format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst)); + format(file, "/* %-gDF */", brw_eu_inst_imm_df(devinfo, inst)); break; case BRW_TYPE_HF: format(file, "0x%04xHF", - (uint16_t) brw_inst_imm_ud(devinfo, inst)); + (uint16_t) brw_eu_inst_imm_ud(devinfo, inst)); pad(file, 48); format(file, "/* %-gHF */", - _mesa_half_to_float((uint16_t) brw_inst_imm_ud(devinfo, inst))); + _mesa_half_to_float((uint16_t) brw_eu_inst_imm_ud(devinfo, inst))); break; case BRW_TYPE_UB: case BRW_TYPE_B: @@ -1665,79 +1665,79 @@ src0(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; - if (is_split_send(devinfo, brw_inst_opcode(isa, inst))) { + if (is_split_send(devinfo, brw_eu_inst_opcode(isa, inst))) { if (devinfo->ver >= 30 && - brw_inst_send_src0_reg_file(devinfo, inst) == ARF) { + brw_eu_inst_send_src0_reg_file(devinfo, inst) == ARF) { format(file, "r["); - reg(file, ARF, brw_inst_src0_da_reg_nr(devinfo, inst)); - format(file, ".%u]", (unsigned)brw_inst_send_src0_subreg_nr(devinfo, inst) * 2); + reg(file, ARF, brw_eu_inst_src0_da_reg_nr(devinfo, inst)); + format(file, ".%u]", (unsigned)brw_eu_inst_send_src0_subreg_nr(devinfo, inst) * 2); return 0; } else if (devinfo->ver >= 12) { return src_sends_da(file, devinfo, BRW_TYPE_UD, - brw_inst_send_src0_reg_file(devinfo, inst), - brw_inst_src0_da_reg_nr(devinfo, inst), + brw_eu_inst_send_src0_reg_file(devinfo, inst), + brw_eu_inst_src0_da_reg_nr(devinfo, inst), 0); - } else if (brw_inst_send_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + } else if (brw_eu_inst_send_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { return src_sends_da(file, devinfo, BRW_TYPE_UD, FIXED_GRF, - brw_inst_src0_da_reg_nr(devinfo, inst), - brw_inst_src0_da16_subreg_nr(devinfo, inst)); + brw_eu_inst_src0_da_reg_nr(devinfo, inst), + brw_eu_inst_src0_da16_subreg_nr(devinfo, inst)); } else { return src_sends_ia(file, devinfo, BRW_TYPE_UD, - brw_inst_send_src0_ia16_addr_imm(devinfo, inst), - brw_inst_src0_ia_subreg_nr(devinfo, inst)); + brw_eu_inst_send_src0_ia16_addr_imm(devinfo, inst), + brw_eu_inst_src0_ia_subreg_nr(devinfo, inst)); } - } else if (brw_inst_src0_reg_file(devinfo, inst) == IMM) { - return imm(file, isa, brw_inst_src0_type(devinfo, inst), inst); - } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + } else if (brw_eu_inst_src0_reg_file(devinfo, inst) == IMM) { + return imm(file, isa, brw_eu_inst_src0_type(devinfo, inst), inst); + } else if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + if (brw_eu_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { return src_da1(file, devinfo, - brw_inst_opcode(isa, inst), - brw_inst_src0_type(devinfo, inst), - brw_inst_src0_reg_file(devinfo, inst), - brw_inst_src0_vstride(devinfo, inst), - brw_inst_src0_width(devinfo, inst), - brw_inst_src0_hstride(devinfo, inst), - brw_inst_src0_da_reg_nr(devinfo, inst), - brw_inst_src0_da1_subreg_nr(devinfo, inst), - brw_inst_src0_abs(devinfo, inst), - brw_inst_src0_negate(devinfo, inst)); + brw_eu_inst_opcode(isa, inst), + brw_eu_inst_src0_type(devinfo, inst), + brw_eu_inst_src0_reg_file(devinfo, inst), + brw_eu_inst_src0_vstride(devinfo, inst), + brw_eu_inst_src0_width(devinfo, inst), + brw_eu_inst_src0_hstride(devinfo, inst), + brw_eu_inst_src0_da_reg_nr(devinfo, inst), + brw_eu_inst_src0_da1_subreg_nr(devinfo, inst), + brw_eu_inst_src0_abs(devinfo, inst), + brw_eu_inst_src0_negate(devinfo, inst)); } else { return src_ia1(file, devinfo, - brw_inst_opcode(isa, inst), - brw_inst_src0_type(devinfo, inst), - brw_inst_src0_ia1_addr_imm(devinfo, inst), - brw_inst_src0_ia_subreg_nr(devinfo, inst), - brw_inst_src0_negate(devinfo, inst), - brw_inst_src0_abs(devinfo, inst), - brw_inst_src0_hstride(devinfo, inst), - brw_inst_src0_width(devinfo, inst), - brw_inst_src0_vstride(devinfo, inst)); + brw_eu_inst_opcode(isa, inst), + brw_eu_inst_src0_type(devinfo, inst), + brw_eu_inst_src0_ia1_addr_imm(devinfo, inst), + brw_eu_inst_src0_ia_subreg_nr(devinfo, inst), + brw_eu_inst_src0_negate(devinfo, inst), + brw_eu_inst_src0_abs(devinfo, inst), + brw_eu_inst_src0_hstride(devinfo, inst), + brw_eu_inst_src0_width(devinfo, inst), + brw_eu_inst_src0_vstride(devinfo, inst)); } } else { - if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + if (brw_eu_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { return src_da16(file, devinfo, - brw_inst_opcode(isa, inst), - brw_inst_src0_type(devinfo, inst), - brw_inst_src0_reg_file(devinfo, inst), - brw_inst_src0_vstride(devinfo, inst), - brw_inst_src0_da_reg_nr(devinfo, inst), - brw_inst_src0_da16_subreg_nr(devinfo, inst), - brw_inst_src0_abs(devinfo, inst), - brw_inst_src0_negate(devinfo, inst), - brw_inst_src0_da16_swiz_x(devinfo, inst), - brw_inst_src0_da16_swiz_y(devinfo, inst), - brw_inst_src0_da16_swiz_z(devinfo, inst), - brw_inst_src0_da16_swiz_w(devinfo, inst)); + brw_eu_inst_opcode(isa, inst), + brw_eu_inst_src0_type(devinfo, inst), + brw_eu_inst_src0_reg_file(devinfo, inst), + brw_eu_inst_src0_vstride(devinfo, inst), + brw_eu_inst_src0_da_reg_nr(devinfo, inst), + brw_eu_inst_src0_da16_subreg_nr(devinfo, inst), + brw_eu_inst_src0_abs(devinfo, inst), + brw_eu_inst_src0_negate(devinfo, inst), + brw_eu_inst_src0_da16_swiz_x(devinfo, inst), + brw_eu_inst_src0_da16_swiz_y(devinfo, inst), + brw_eu_inst_src0_da16_swiz_z(devinfo, inst), + brw_eu_inst_src0_da16_swiz_w(devinfo, inst)); } else { string(file, "Indirect align16 address mode not supported"); return 1; @@ -1750,58 +1750,58 @@ src1(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; - if (is_split_send(devinfo, brw_inst_opcode(isa, inst))) { + if (is_split_send(devinfo, brw_eu_inst_opcode(isa, inst))) { return src_sends_da(file, devinfo, BRW_TYPE_UD, - brw_inst_send_src1_reg_file(devinfo, inst), - brw_inst_send_src1_reg_nr(devinfo, inst), + brw_eu_inst_send_src1_reg_file(devinfo, inst), + brw_eu_inst_send_src1_reg_nr(devinfo, inst), 0 /* subreg_nr */); - } else if (brw_inst_src1_reg_file(devinfo, inst) == IMM) { - return imm(file, isa, brw_inst_src1_type(devinfo, inst), inst); - } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + } else if (brw_eu_inst_src1_reg_file(devinfo, inst) == IMM) { + return imm(file, isa, brw_eu_inst_src1_type(devinfo, inst), inst); + } else if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + if (brw_eu_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { return src_da1(file, devinfo, - brw_inst_opcode(isa, inst), - brw_inst_src1_type(devinfo, inst), - brw_inst_src1_reg_file(devinfo, inst), - brw_inst_src1_vstride(devinfo, inst), - brw_inst_src1_width(devinfo, inst), - brw_inst_src1_hstride(devinfo, inst), - brw_inst_src1_da_reg_nr(devinfo, inst), - brw_inst_src1_da1_subreg_nr(devinfo, inst), - brw_inst_src1_abs(devinfo, inst), - brw_inst_src1_negate(devinfo, inst)); + brw_eu_inst_opcode(isa, inst), + brw_eu_inst_src1_type(devinfo, inst), + brw_eu_inst_src1_reg_file(devinfo, inst), + brw_eu_inst_src1_vstride(devinfo, inst), + brw_eu_inst_src1_width(devinfo, inst), + brw_eu_inst_src1_hstride(devinfo, inst), + brw_eu_inst_src1_da_reg_nr(devinfo, inst), + brw_eu_inst_src1_da1_subreg_nr(devinfo, inst), + brw_eu_inst_src1_abs(devinfo, inst), + brw_eu_inst_src1_negate(devinfo, inst)); } else { return src_ia1(file, devinfo, - brw_inst_opcode(isa, inst), - brw_inst_src1_type(devinfo, inst), - brw_inst_src1_ia1_addr_imm(devinfo, inst), - brw_inst_src1_ia_subreg_nr(devinfo, inst), - brw_inst_src1_negate(devinfo, inst), - brw_inst_src1_abs(devinfo, inst), - brw_inst_src1_hstride(devinfo, inst), - brw_inst_src1_width(devinfo, inst), - brw_inst_src1_vstride(devinfo, inst)); + brw_eu_inst_opcode(isa, inst), + brw_eu_inst_src1_type(devinfo, inst), + brw_eu_inst_src1_ia1_addr_imm(devinfo, inst), + brw_eu_inst_src1_ia_subreg_nr(devinfo, inst), + brw_eu_inst_src1_negate(devinfo, inst), + brw_eu_inst_src1_abs(devinfo, inst), + brw_eu_inst_src1_hstride(devinfo, inst), + brw_eu_inst_src1_width(devinfo, inst), + brw_eu_inst_src1_vstride(devinfo, inst)); } } else { - if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { + if (brw_eu_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { return src_da16(file, devinfo, - brw_inst_opcode(isa, inst), - brw_inst_src1_type(devinfo, inst), - brw_inst_src1_reg_file(devinfo, inst), - brw_inst_src1_vstride(devinfo, inst), - brw_inst_src1_da_reg_nr(devinfo, inst), - brw_inst_src1_da16_subreg_nr(devinfo, inst), - brw_inst_src1_abs(devinfo, inst), - brw_inst_src1_negate(devinfo, inst), - brw_inst_src1_da16_swiz_x(devinfo, inst), - brw_inst_src1_da16_swiz_y(devinfo, inst), - brw_inst_src1_da16_swiz_z(devinfo, inst), - brw_inst_src1_da16_swiz_w(devinfo, inst)); + brw_eu_inst_opcode(isa, inst), + brw_eu_inst_src1_type(devinfo, inst), + brw_eu_inst_src1_reg_file(devinfo, inst), + brw_eu_inst_src1_vstride(devinfo, inst), + brw_eu_inst_src1_da_reg_nr(devinfo, inst), + brw_eu_inst_src1_da16_subreg_nr(devinfo, inst), + brw_eu_inst_src1_abs(devinfo, inst), + brw_eu_inst_src1_negate(devinfo, inst), + brw_eu_inst_src1_da16_swiz_x(devinfo, inst), + brw_eu_inst_src1_da16_swiz_y(devinfo, inst), + brw_eu_inst_src1_da16_swiz_z(devinfo, inst), + brw_eu_inst_src1_da16_swiz_w(devinfo, inst)); } else { string(file, "Indirect align16 address mode not supported"); return 1; @@ -1813,10 +1813,10 @@ static int qtr_ctrl(FILE *file, const struct intel_device_info *devinfo, const brw_eu_inst *inst) { - int qtr_ctl = brw_inst_qtr_control(devinfo, inst); - int exec_size = 1 << brw_inst_exec_size(devinfo, inst); + int qtr_ctl = brw_eu_inst_qtr_control(devinfo, inst); + int exec_size = 1 << brw_eu_inst_exec_size(devinfo, inst); const unsigned nib_ctl = devinfo->ver >= 20 ? 0 : - brw_inst_nib_control(devinfo, inst); + brw_eu_inst_nib_control(devinfo, inst); if (exec_size < 8 || nib_ctl) { format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1); @@ -1852,21 +1852,21 @@ inst_has_type(const struct brw_isa_info *isa, const struct intel_device_info *devinfo = isa->devinfo; const unsigned num_sources = brw_num_sources_from_inst(isa, inst); - if (brw_inst_dst_type(devinfo, inst) == type) + if (brw_eu_inst_dst_type(devinfo, inst) == type) return true; if (num_sources >= 3) { - if (brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1) - return brw_inst_3src_a1_src0_type(devinfo, inst) == type || - brw_inst_3src_a1_src1_type(devinfo, inst) == type || - brw_inst_3src_a1_src2_type(devinfo, inst) == type; + if (brw_eu_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1) + return brw_eu_inst_3src_a1_src0_type(devinfo, inst) == type || + brw_eu_inst_3src_a1_src1_type(devinfo, inst) == type || + brw_eu_inst_3src_a1_src2_type(devinfo, inst) == type; else - return brw_inst_3src_a16_src_type(devinfo, inst) == type; + return brw_eu_inst_3src_a16_src_type(devinfo, inst) == type; } else if (num_sources == 2) { - return brw_inst_src0_type(devinfo, inst) == type || - brw_inst_src1_type(devinfo, inst) == type; + return brw_eu_inst_src0_type(devinfo, inst) == type || + brw_eu_inst_src1_type(devinfo, inst) == type; } else { - return brw_inst_src0_type(devinfo, inst) == type; + return brw_eu_inst_src0_type(devinfo, inst) == type; } } @@ -1874,8 +1874,8 @@ static int swsb(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; - const enum opcode opcode = brw_inst_opcode(isa, inst); - const uint32_t x = brw_inst_swsb(devinfo, inst); + const enum opcode opcode = brw_eu_inst_opcode(isa, inst); + const uint32_t x = brw_eu_inst_swsb(devinfo, inst); const bool is_unordered = opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC || opcode == BRW_OPCODE_MATH || opcode == BRW_OPCODE_DPAS || @@ -1979,25 +1979,25 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, int err = 0; int space = 0; - const enum opcode opcode = brw_inst_opcode(isa, inst); + const enum opcode opcode = brw_eu_inst_opcode(isa, inst); const struct opcode_desc *desc = brw_opcode_desc(isa, opcode); - if (brw_inst_pred_control(devinfo, inst)) { + if (brw_eu_inst_pred_control(devinfo, inst)) { string(file, "("); err |= control(file, "predicate inverse", pred_inv, - brw_inst_pred_inv(devinfo, inst), NULL); + brw_eu_inst_pred_inv(devinfo, inst), NULL); format(file, "f%"PRIu64".%"PRIu64, - brw_inst_flag_reg_nr(devinfo, inst), - brw_inst_flag_subreg_nr(devinfo, inst)); + brw_eu_inst_flag_reg_nr(devinfo, inst), + brw_eu_inst_flag_subreg_nr(devinfo, inst)); if (devinfo->ver >= 20) { err |= control(file, "predicate control", xe2_pred_ctrl, - brw_inst_pred_control(devinfo, inst), NULL); - } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + brw_eu_inst_pred_control(devinfo, inst), NULL); + } else if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { err |= control(file, "predicate control align1", pred_ctrl_align1, - brw_inst_pred_control(devinfo, inst), NULL); + brw_eu_inst_pred_control(devinfo, inst), NULL); } else { err |= control(file, "predicate control align16", pred_ctrl_align16, - brw_inst_pred_control(devinfo, inst), NULL); + brw_eu_inst_pred_control(devinfo, inst), NULL); } string(file, ") "); } @@ -2005,57 +2005,57 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, err |= print_opcode(file, isa, opcode); if (!is_send(opcode)) - err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst), + err |= control(file, "saturate", saturate, brw_eu_inst_saturate(devinfo, inst), NULL); err |= control(file, "debug control", debug_ctrl, - brw_inst_debug_control(devinfo, inst), NULL); + brw_eu_inst_debug_control(devinfo, inst), NULL); if (opcode == BRW_OPCODE_MATH) { string(file, " "); err |= control(file, "function", math_function, - brw_inst_math_function(devinfo, inst), NULL); + brw_eu_inst_math_function(devinfo, inst), NULL); } else if (opcode == BRW_OPCODE_SYNC) { string(file, " "); err |= control(file, "function", sync_function, - brw_inst_cond_modifier(devinfo, inst), NULL); + brw_eu_inst_cond_modifier(devinfo, inst), NULL); } else if (opcode == BRW_OPCODE_DPAS) { string(file, "."); err |= control(file, "systolic depth", dpas_systolic_depth, - brw_inst_dpas_3src_sdepth(devinfo, inst), NULL); + brw_eu_inst_dpas_3src_sdepth(devinfo, inst), NULL); - const unsigned rcount = brw_inst_dpas_3src_rcount(devinfo, inst) + 1; + const unsigned rcount = brw_eu_inst_dpas_3src_rcount(devinfo, inst) + 1; format(file, "x%d", rcount); } else if (!is_send(opcode) && (devinfo->ver < 12 || - brw_inst_src0_reg_file(devinfo, inst) != IMM || - brw_type_size_bytes(brw_inst_src0_type(devinfo, inst)) < 8)) { + brw_eu_inst_src0_reg_file(devinfo, inst) != IMM || + brw_type_size_bytes(brw_eu_inst_src0_type(devinfo, inst)) < 8)) { err |= control(file, "conditional modifier", conditional_modifier, - brw_inst_cond_modifier(devinfo, inst), NULL); + brw_eu_inst_cond_modifier(devinfo, inst), NULL); /* If we're using the conditional modifier, print which flags reg is * used for it. Note that on gfx6+, the embedded-condition SEL and * control flow doesn't update flags. */ - if (brw_inst_cond_modifier(devinfo, inst) && + if (brw_eu_inst_cond_modifier(devinfo, inst) && (opcode != BRW_OPCODE_SEL && opcode != BRW_OPCODE_CSEL && opcode != BRW_OPCODE_IF && opcode != BRW_OPCODE_WHILE)) { format(file, ".f%"PRIu64".%"PRIu64, - brw_inst_flag_reg_nr(devinfo, inst), - brw_inst_flag_subreg_nr(devinfo, inst)); + brw_eu_inst_flag_reg_nr(devinfo, inst), + brw_eu_inst_flag_subreg_nr(devinfo, inst)); } } if (opcode != BRW_OPCODE_NOP) { string(file, "("); err |= control(file, "execution size", exec_size, - brw_inst_exec_size(devinfo, inst), NULL); + brw_eu_inst_exec_size(devinfo, inst), NULL); string(file, ")"); } @@ -2063,13 +2063,13 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, /* Instructions that have UIP also have JIP. */ pad(file, 16); string(file, "JIP: "); - write_label(file, devinfo, root_label, offset, brw_inst_jip(devinfo, inst)); + write_label(file, devinfo, root_label, offset, brw_eu_inst_jip(devinfo, inst)); pad(file, 38); string(file, "UIP: "); - write_label(file, devinfo, root_label, offset, brw_inst_uip(devinfo, inst)); + write_label(file, devinfo, root_label, offset, brw_eu_inst_uip(devinfo, inst)); } else if (brw_has_jip(devinfo, opcode)) { - int jip = brw_inst_jip(devinfo, inst); + int jip = brw_eu_inst_jip(devinfo, inst); pad(file, 16); string(file, "JIP: "); @@ -2120,42 +2120,42 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, } if (is_send(opcode)) { - enum brw_message_target sfid = brw_inst_sfid(devinfo, inst); + enum brw_message_target sfid = brw_eu_inst_sfid(devinfo, inst); bool has_imm_desc = false, has_imm_ex_desc = false; uint32_t imm_desc = 0, imm_ex_desc = 0; if (is_split_send(devinfo, opcode)) { const bool is_send_gather = - devinfo->ver >= 30 && brw_inst_send_src0_reg_file(devinfo, inst) == ARF; + devinfo->ver >= 30 && brw_eu_inst_send_src0_reg_file(devinfo, inst) == ARF; pad(file, 64); - if (brw_inst_send_sel_reg32_desc(devinfo, inst)) { + if (brw_eu_inst_send_sel_reg32_desc(devinfo, inst)) { /* show the indirect descriptor source */ err |= src_send_desc_ia(file, devinfo, 0); } else { has_imm_desc = true; - imm_desc = brw_inst_send_desc(devinfo, inst); + imm_desc = brw_eu_inst_send_desc(devinfo, inst); fprintf(file, "0x%08"PRIx32, imm_desc); } pad(file, 80); - if (brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) { + if (brw_eu_inst_send_sel_reg32_ex_desc(devinfo, inst)) { /* show the indirect descriptor source */ err |= src_send_desc_ia(file, devinfo, - brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst)); + brw_eu_inst_send_ex_desc_ia_subreg_nr(devinfo, inst)); } else { has_imm_ex_desc = true; - imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst, is_send_gather); + imm_ex_desc = brw_eu_inst_sends_ex_desc(devinfo, inst, is_send_gather); fprintf(file, "0x%08"PRIx32, imm_ex_desc); } } else { - if (brw_inst_src1_reg_file(devinfo, inst) != IMM) { + if (brw_eu_inst_src1_reg_file(devinfo, inst) != IMM) { /* show the indirect descriptor source */ pad(file, 48); err |= src1(file, isa, inst); pad(file, 64); } else { has_imm_desc = true; - imm_desc = brw_inst_send_desc(devinfo, inst); + imm_desc = brw_eu_inst_send_desc(devinfo, inst); pad(file, 48); } @@ -2228,8 +2228,8 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, if (is_rt_write) { err |= control(file, "RT message type", devinfo->ver >= 20 ? m_rt_write_subtype_xe2 : m_rt_write_subtype, - brw_inst_rt_message_type(devinfo, inst), &space); - if (brw_inst_rt_slot_group(devinfo, inst)) + brw_eu_inst_rt_message_type(devinfo, inst), &space); + if (brw_eu_inst_rt_slot_group(devinfo, inst)) string(file, " Hi"); if (brw_fb_write_desc_last_render_target(devinfo, imm_desc)) string(file, " LastRT"); @@ -2307,26 +2307,26 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, lsc_msg_desc_addr_type(devinfo, imm_desc), &space); format(file, " )"); } else { - unsigned urb_opcode = brw_inst_urb_opcode(devinfo, inst); + unsigned urb_opcode = brw_eu_inst_urb_opcode(devinfo, inst); - format(file, " offset %"PRIu64, brw_inst_urb_global_offset(devinfo, inst)); + format(file, " offset %"PRIu64, brw_eu_inst_urb_global_offset(devinfo, inst)); space = 1; err |= control(file, "urb opcode", gfx7_urb_opcode, urb_opcode, &space); - if (brw_inst_urb_per_slot_offset(devinfo, inst)) { + if (brw_eu_inst_urb_per_slot_offset(devinfo, inst)) { string(file, " per-slot"); } if (urb_opcode == GFX8_URB_OPCODE_SIMD8_WRITE || urb_opcode == GFX8_URB_OPCODE_SIMD8_READ) { - if (brw_inst_urb_channel_mask_present(devinfo, inst)) + if (brw_eu_inst_urb_channel_mask_present(devinfo, inst)) string(file, " masked"); } else if (urb_opcode != GFX125_URB_OPCODE_FENCE) { err |= control(file, "urb swizzle", urb_swizzle, - brw_inst_urb_swizzle_control(devinfo, inst), + brw_eu_inst_urb_swizzle_control(devinfo, inst), &space); } } @@ -2337,7 +2337,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, case BRW_SFID_MESSAGE_GATEWAY: format(file, " (%s)", - gfx7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]); + gfx7_gateway_subfuncid[brw_eu_inst_gateway_subfuncid(devinfo, inst)]); break; case GFX12_SFID_SLM: @@ -2413,7 +2413,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, format(file, " src0_len = %u,", brw_message_desc_mlen(devinfo, imm_desc) / reg_unit(devinfo)); - if (!brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) + if (!brw_eu_inst_send_sel_reg32_ex_desc(devinfo, inst)) format(file, " src1_len = %d", brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc) / reg_unit(devinfo)); @@ -2434,7 +2434,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, format(file, ", bti %u, ", brw_dp_desc_binding_table_index(devinfo, imm_desc)); - switch (brw_inst_dp_msg_type(devinfo, inst)) { + switch (brw_eu_inst_dp_msg_type(devinfo, inst)) { case GFX7_DATAPORT_DC_UNTYPED_ATOMIC_OP: control(file, "atomic op", aop, brw_dp_desc_msg_control(devinfo, imm_desc) & 0xf, @@ -2468,7 +2468,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, format(file, ", Surface = %u, ", brw_dp_desc_binding_table_index(devinfo, imm_desc)); - switch (brw_inst_dp_msg_type(devinfo, inst)) { + switch (brw_eu_inst_dp_msg_type(devinfo, inst)) { case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP: case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP: case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP: @@ -2514,9 +2514,9 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, case GFX7_SFID_PIXEL_INTERPOLATOR: format(file, " (%s, %s, 0x%02"PRIx64")", - brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp", - pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)], - brw_inst_pi_message_data(devinfo, inst)); + brw_eu_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp", + pixel_interpolator_msg_types[brw_eu_inst_pi_message_type(devinfo, inst)], + brw_eu_inst_pi_message_data(devinfo, inst)); break; case GEN_RT_SFID_RAY_TRACE_ACCELERATOR: @@ -2540,10 +2540,10 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, string(file, " "); } if (devinfo->verx10 >= 125 && - brw_inst_send_sel_reg32_ex_desc(devinfo, inst) && - brw_inst_send_ex_bso(devinfo, inst)) { + brw_eu_inst_send_sel_reg32_ex_desc(devinfo, inst) && + brw_eu_inst_send_ex_bso(devinfo, inst)) { format(file, " src1_len = %u", - (unsigned) brw_inst_send_src1_len(devinfo, inst)); + (unsigned) brw_eu_inst_send_src1_len(devinfo, inst)); format(file, " ex_bso"); } @@ -2566,14 +2566,14 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, string(file, "{"); space = 1; err |= control(file, "access mode", access_mode, - brw_inst_access_mode(devinfo, inst), &space); + brw_eu_inst_access_mode(devinfo, inst), &space); err |= control(file, "write enable control", wectrl, - brw_inst_mask_control(devinfo, inst), &space); + brw_eu_inst_mask_control(devinfo, inst), &space); if (devinfo->ver < 12) { err |= control(file, "dependency control", dep_ctrl, - ((brw_inst_no_dd_check(devinfo, inst) << 1) | - brw_inst_no_dd_clear(devinfo, inst)), &space); + ((brw_eu_inst_no_dd_check(devinfo, inst) << 1) | + brw_eu_inst_no_dd_clear(devinfo, inst)), &space); } err |= qtr_ctrl(file, devinfo, inst); @@ -2583,19 +2583,19 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space); err |= control(file, "thread control", thread_ctrl, - (devinfo->ver >= 12 ? brw_inst_atomic_control(devinfo, inst) : - brw_inst_thread_control(devinfo, inst)), + (devinfo->ver >= 12 ? brw_eu_inst_atomic_control(devinfo, inst) : + brw_eu_inst_thread_control(devinfo, inst)), &space); if (brw_has_branch_ctrl(devinfo, opcode)) { err |= control(file, "branch ctrl", branch_ctrl, - brw_inst_branch_control(devinfo, inst), &space); + brw_eu_inst_branch_control(devinfo, inst), &space); } else if (devinfo->ver < 20) { err |= control(file, "acc write control", accwr, - brw_inst_acc_wr_control(devinfo, inst), &space); + brw_eu_inst_acc_wr_control(devinfo, inst), &space); } if (is_send(opcode)) err |= control(file, "end of thread", end_of_thread, - brw_inst_eot(devinfo, inst), &space); + brw_eu_inst_eot(devinfo, inst), &space); if (space) string(file, " "); string(file, "}"); @@ -2616,15 +2616,15 @@ brw_disassemble_find_end(const struct brw_isa_info *isa, while (true) { const brw_eu_inst *insn = assembly + offset; - if (brw_inst_cmpt_control(devinfo, insn)) { + if (brw_eu_inst_cmpt_control(devinfo, insn)) { offset += 8; } else { offset += 16; } /* Simplistic, but efficient way to terminate disasm */ - uint32_t opcode = brw_inst_opcode(isa, insn); - if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) { + uint32_t opcode = brw_eu_inst_opcode(isa, insn); + if (opcode == 0 || (is_send(opcode) && brw_eu_inst_eot(devinfo, insn))) { break; } } diff --git a/src/intel/compiler/brw_eu.c b/src/intel/compiler/brw_eu.c index 52b4dfa3a95..b8300d3a4c0 100644 --- a/src/intel/compiler/brw_eu.c +++ b/src/intel/compiler/brw_eu.c @@ -187,17 +187,17 @@ void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode ) * [group, group + exec_size) to the instruction passed as argument. */ void -brw_inst_set_group(const struct intel_device_info *devinfo, +brw_eu_inst_set_group(const struct intel_device_info *devinfo, brw_eu_inst *inst, unsigned group) { if (devinfo->ver >= 20) { assert(group % 8 == 0 && group < 32); - brw_inst_set_qtr_control(devinfo, inst, group / 8); + brw_eu_inst_set_qtr_control(devinfo, inst, group / 8); } else { assert(group % 4 == 0 && group < 32); - brw_inst_set_qtr_control(devinfo, inst, group / 8); - brw_inst_set_nib_control(devinfo, inst, (group / 4) % 2); + brw_eu_inst_set_qtr_control(devinfo, inst, group / 8); + brw_eu_inst_set_nib_control(devinfo, inst, (group / 4) % 2); } } @@ -448,7 +448,7 @@ brw_label_assembly(const struct brw_isa_info *isa, const brw_eu_inst *inst = (const brw_eu_inst *) ((const char *) assembly + offset); brw_eu_inst uncompacted; - bool is_compact = brw_inst_cmpt_control(devinfo, inst); + bool is_compact = brw_eu_inst_cmpt_control(devinfo, inst); if (is_compact) { brw_eu_compact_inst *compacted = (brw_eu_compact_inst *)inst; @@ -456,14 +456,14 @@ brw_label_assembly(const struct brw_isa_info *isa, inst = &uncompacted; } - if (brw_has_uip(devinfo, brw_inst_opcode(isa, inst))) { + if (brw_has_uip(devinfo, brw_eu_inst_opcode(isa, inst))) { /* Instructions that have UIP also have JIP. */ brw_create_label(&root_label, - offset + brw_inst_uip(devinfo, inst) * to_bytes_scale, mem_ctx); + offset + brw_eu_inst_uip(devinfo, inst) * to_bytes_scale, mem_ctx); brw_create_label(&root_label, - offset + brw_inst_jip(devinfo, inst) * to_bytes_scale, mem_ctx); - } else if (brw_has_jip(devinfo, brw_inst_opcode(isa, inst))) { - int jip = brw_inst_jip(devinfo, inst); + offset + brw_eu_inst_jip(devinfo, inst) * to_bytes_scale, mem_ctx); + } else if (brw_has_jip(devinfo, brw_eu_inst_opcode(isa, inst))) { + int jip = brw_eu_inst_jip(devinfo, inst); brw_create_label(&root_label, offset + jip * to_bytes_scale, mem_ctx); } @@ -511,7 +511,7 @@ brw_disassemble(const struct brw_isa_info *isa, } } - bool compacted = brw_inst_cmpt_control(devinfo, insn); + bool compacted = brw_eu_inst_cmpt_control(devinfo, insn); if (0) fprintf(out, "0x%08x: ", offset); @@ -708,11 +708,11 @@ brw_num_sources_from_inst(const struct brw_isa_info *isa, { const struct intel_device_info *devinfo = isa->devinfo; const struct opcode_desc *desc = - brw_opcode_desc(isa, brw_inst_opcode(isa, inst)); + brw_opcode_desc(isa, brw_eu_inst_opcode(isa, inst)); unsigned math_function; - if (brw_inst_opcode(isa, inst) == BRW_OPCODE_MATH) { - math_function = brw_inst_math_function(devinfo, inst); + if (brw_eu_inst_opcode(isa, inst) == BRW_OPCODE_MATH) { + math_function = brw_eu_inst_math_function(devinfo, inst); } else { assert(desc->nsrc < 4); return desc->nsrc; diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index e745ba257a1..ba06b716384 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -142,7 +142,7 @@ void brw_set_default_exec_size(struct brw_codegen *p, unsigned value); void brw_set_default_mask_control( struct brw_codegen *p, unsigned value ); void brw_set_default_saturate( struct brw_codegen *p, bool enable ); void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode ); -void brw_inst_set_group(const struct intel_device_info *devinfo, +void brw_eu_inst_set_group(const struct intel_device_info *devinfo, brw_eu_inst *inst, unsigned group); void brw_set_default_group(struct brw_codegen *p, unsigned group); void brw_set_default_predicate_control(struct brw_codegen *p, enum brw_predicate pc); @@ -1593,7 +1593,7 @@ next_offset(const struct intel_device_info *devinfo, void *store, int offset) { brw_eu_inst *insn = (brw_eu_inst *)((char *)store + offset); - if (brw_inst_cmpt_control(devinfo, insn)) + if (brw_eu_inst_cmpt_control(devinfo, insn)) return offset + 8; else return offset + 16; diff --git a/src/intel/compiler/brw_eu_compact.c b/src/intel/compiler/brw_eu_compact.c index 823e58abd1e..81ddf5271c6 100644 --- a/src/intel/compiler/brw_eu_compact.c +++ b/src/intel/compiler/brw_eu_compact.c @@ -1339,9 +1339,9 @@ has_unmapped_bits(const struct brw_isa_info *isa, const brw_eu_inst *src) const struct intel_device_info *devinfo = isa->devinfo; /* EOT can only be mapped on a send if the src1 is an immediate */ - if ((brw_inst_opcode(isa, src) == BRW_OPCODE_SENDC || - brw_inst_opcode(isa, src) == BRW_OPCODE_SEND) && - brw_inst_eot(devinfo, src)) + if ((brw_eu_inst_opcode(isa, src) == BRW_OPCODE_SENDC || + brw_eu_inst_opcode(isa, src) == BRW_OPCODE_SEND) && + brw_eu_inst_eot(devinfo, src)) return true; /* Check for instruction bits that don't map to any of the fields of the @@ -1393,14 +1393,14 @@ brw_try_compact_3src_instruction(const struct brw_isa_info *isa, { const struct intel_device_info *devinfo = isa->devinfo; - bool is_dpas = brw_inst_opcode(isa, src) == BRW_OPCODE_DPAS; + bool is_dpas = brw_eu_inst_opcode(isa, src) == BRW_OPCODE_DPAS; if (has_3src_unmapped_bits(devinfo, src, is_dpas)) return false; #define compact(field) \ - brw_compact_inst_set_3src_##field(devinfo, dst, brw_inst_3src_##field(devinfo, src)) + brw_compact_inst_set_3src_##field(devinfo, dst, brw_eu_inst_3src_##field(devinfo, src)) #define compact_a16(field) \ - brw_compact_inst_set_3src_##field(devinfo, dst, brw_inst_3src_a16_##field(devinfo, src)) + brw_compact_inst_set_3src_##field(devinfo, dst, brw_eu_inst_3src_a16_##field(devinfo, src)) compact(hw_opcode); @@ -1571,11 +1571,11 @@ static bool has_immediate(const struct intel_device_info *devinfo, const brw_eu_inst *inst, enum brw_reg_type *type) { - if (brw_inst_src0_reg_file(devinfo, inst) == IMM) { - *type = brw_inst_src0_type(devinfo, inst); + if (brw_eu_inst_src0_reg_file(devinfo, inst) == IMM) { + *type = brw_eu_inst_src0_type(devinfo, inst); return *type != BRW_TYPE_INVALID; - } else if (brw_inst_src1_reg_file(devinfo, inst) == IMM) { - *type = brw_inst_src1_type(devinfo, inst); + } else if (brw_eu_inst_src1_reg_file(devinfo, inst) == IMM) { + *type = brw_eu_inst_src1_type(devinfo, inst); return *type != BRW_TYPE_INVALID; } @@ -1596,26 +1596,26 @@ precompact(const struct brw_isa_info *isa, brw_eu_inst inst) * sequential elements, so convert to those before compacting. */ if (devinfo->verx10 >= 125) { - if (brw_inst_src0_reg_file(devinfo, &inst) == FIXED_GRF && - brw_inst_src0_vstride(devinfo, &inst) > BRW_VERTICAL_STRIDE_1 && - brw_inst_src0_vstride(devinfo, &inst) == (brw_inst_src0_width(devinfo, &inst) + 1) && - brw_inst_src0_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) { - brw_inst_set_src0_vstride(devinfo, &inst, BRW_VERTICAL_STRIDE_1); - brw_inst_set_src0_width(devinfo, &inst, BRW_WIDTH_1); - brw_inst_set_src0_hstride(devinfo, &inst, BRW_HORIZONTAL_STRIDE_0); + if (brw_eu_inst_src0_reg_file(devinfo, &inst) == FIXED_GRF && + brw_eu_inst_src0_vstride(devinfo, &inst) > BRW_VERTICAL_STRIDE_1 && + brw_eu_inst_src0_vstride(devinfo, &inst) == (brw_eu_inst_src0_width(devinfo, &inst) + 1) && + brw_eu_inst_src0_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) { + brw_eu_inst_set_src0_vstride(devinfo, &inst, BRW_VERTICAL_STRIDE_1); + brw_eu_inst_set_src0_width(devinfo, &inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_hstride(devinfo, &inst, BRW_HORIZONTAL_STRIDE_0); } - if (brw_inst_src1_reg_file(devinfo, &inst) == FIXED_GRF && - brw_inst_src1_vstride(devinfo, &inst) > BRW_VERTICAL_STRIDE_1 && - brw_inst_src1_vstride(devinfo, &inst) == (brw_inst_src1_width(devinfo, &inst) + 1) && - brw_inst_src1_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) { - brw_inst_set_src1_vstride(devinfo, &inst, BRW_VERTICAL_STRIDE_1); - brw_inst_set_src1_width(devinfo, &inst, BRW_WIDTH_1); - brw_inst_set_src1_hstride(devinfo, &inst, BRW_HORIZONTAL_STRIDE_0); + if (brw_eu_inst_src1_reg_file(devinfo, &inst) == FIXED_GRF && + brw_eu_inst_src1_vstride(devinfo, &inst) > BRW_VERTICAL_STRIDE_1 && + brw_eu_inst_src1_vstride(devinfo, &inst) == (brw_eu_inst_src1_width(devinfo, &inst) + 1) && + brw_eu_inst_src1_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) { + brw_eu_inst_set_src1_vstride(devinfo, &inst, BRW_VERTICAL_STRIDE_1); + brw_eu_inst_set_src1_width(devinfo, &inst, BRW_WIDTH_1); + brw_eu_inst_set_src1_hstride(devinfo, &inst, BRW_HORIZONTAL_STRIDE_0); } } - if (brw_inst_src0_reg_file(devinfo, &inst) != IMM) + if (brw_eu_inst_src0_reg_file(devinfo, &inst) != IMM) return inst; /* The Bspec's section titled "Non-present Operands" claims that if src0 @@ -1640,10 +1640,10 @@ precompact(const struct brw_isa_info *isa, brw_eu_inst inst) * overlap with the immediate and setting them would overwrite the * immediate we set. */ - if (!(brw_inst_src0_type(devinfo, &inst) == BRW_TYPE_DF || - brw_inst_src0_type(devinfo, &inst) == BRW_TYPE_UQ || - brw_inst_src0_type(devinfo, &inst) == BRW_TYPE_Q)) { - brw_inst_set_src1_reg_hw_type(devinfo, &inst, 0); + if (!(brw_eu_inst_src0_type(devinfo, &inst) == BRW_TYPE_DF || + brw_eu_inst_src0_type(devinfo, &inst) == BRW_TYPE_UQ || + brw_eu_inst_src0_type(devinfo, &inst) == BRW_TYPE_Q)) { + brw_eu_inst_set_src1_reg_hw_type(devinfo, &inst, 0); } /* Compacted instructions only have 12-bits (plus 1 for the other 20) @@ -1661,12 +1661,12 @@ precompact(const struct brw_isa_info *isa, brw_eu_inst inst) * removing the need for this. */ if (devinfo->ver < 12 && - brw_inst_imm_ud(devinfo, &inst) == 0x0 && - brw_inst_src0_type(devinfo, &inst) == BRW_TYPE_F && - brw_inst_dst_type(devinfo, &inst) == BRW_TYPE_F && - brw_inst_dst_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) { - enum brw_reg_file file = brw_inst_src0_reg_file(devinfo, &inst); - brw_inst_set_src0_file_type(devinfo, &inst, file, BRW_TYPE_VF); + brw_eu_inst_imm_ud(devinfo, &inst) == 0x0 && + brw_eu_inst_src0_type(devinfo, &inst) == BRW_TYPE_F && + brw_eu_inst_dst_type(devinfo, &inst) == BRW_TYPE_F && + brw_eu_inst_dst_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) { + enum brw_reg_file file = brw_eu_inst_src0_reg_file(devinfo, &inst); + brw_eu_inst_set_src0_file_type(devinfo, &inst, file, BRW_TYPE_VF); } /* There are no mappings for dst:d | i:d, so if the immediate is suitable @@ -1676,15 +1676,15 @@ precompact(const struct brw_isa_info *isa, brw_eu_inst inst) */ if (devinfo->ver < 12 && compact_immediate(devinfo, BRW_TYPE_D, - brw_inst_imm_ud(devinfo, &inst)) != -1 && - brw_inst_cond_modifier(devinfo, &inst) == BRW_CONDITIONAL_NONE && - brw_inst_src0_type(devinfo, &inst) == BRW_TYPE_D && - brw_inst_dst_type(devinfo, &inst) == BRW_TYPE_D) { - enum brw_reg_file src_file = brw_inst_src0_reg_file(devinfo, &inst); - enum brw_reg_file dst_file = brw_inst_dst_reg_file(devinfo, &inst); + brw_eu_inst_imm_ud(devinfo, &inst)) != -1 && + brw_eu_inst_cond_modifier(devinfo, &inst) == BRW_CONDITIONAL_NONE && + brw_eu_inst_src0_type(devinfo, &inst) == BRW_TYPE_D && + brw_eu_inst_dst_type(devinfo, &inst) == BRW_TYPE_D) { + enum brw_reg_file src_file = brw_eu_inst_src0_reg_file(devinfo, &inst); + enum brw_reg_file dst_file = brw_eu_inst_dst_reg_file(devinfo, &inst); - brw_inst_set_src0_file_type(devinfo, &inst, src_file, BRW_TYPE_UD); - brw_inst_set_dst_file_type(devinfo, &inst, dst_file, BRW_TYPE_UD); + brw_eu_inst_set_src0_file_type(devinfo, &inst, src_file, BRW_TYPE_UD); + brw_eu_inst_set_dst_file_type(devinfo, &inst, dst_file, BRW_TYPE_UD); } return inst; @@ -1703,9 +1703,9 @@ try_compact_instruction(const struct compaction_state *c, const struct intel_device_info *devinfo = c->isa->devinfo; brw_eu_compact_inst temp; - assert(brw_inst_cmpt_control(devinfo, src) == 0); + assert(brw_eu_inst_cmpt_control(devinfo, src) == 0); - if (is_3src(c->isa, brw_inst_opcode(c->isa, src))) { + if (is_3src(c->isa, brw_eu_inst_opcode(c->isa, src))) { memset(&temp, 0, sizeof(temp)); if (brw_try_compact_3src_instruction(c->isa, &temp, src)) { *dst = temp; @@ -1722,7 +1722,7 @@ try_compact_instruction(const struct compaction_state *c, if (is_immediate) { compacted_imm = compact_immediate(devinfo, type, - brw_inst_imm_ud(devinfo, src)); + brw_eu_inst_imm_ud(devinfo, src)); if (compacted_imm == -1) return false; } @@ -1733,10 +1733,10 @@ try_compact_instruction(const struct compaction_state *c, memset(&temp, 0, sizeof(temp)); #define compact(field) \ - brw_compact_inst_set_##field(devinfo, &temp, brw_inst_##field(devinfo, src)) + brw_compact_inst_set_##field(devinfo, &temp, brw_eu_inst_##field(devinfo, src)) #define compact_reg(field) \ brw_compact_inst_set_##field##_reg_nr(devinfo, &temp, \ - brw_inst_##field##_da_reg_nr(devinfo, src)) + brw_eu_inst_##field##_da_reg_nr(devinfo, src)) compact(hw_opcode); compact(debug_control); @@ -2085,9 +2085,9 @@ brw_uncompact_3src_instruction(const struct compaction_state *c, const struct intel_device_info *devinfo = c->isa->devinfo; #define uncompact(field) \ - brw_inst_set_3src_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src)) + brw_eu_inst_set_3src_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src)) #define uncompact_a16(field) \ - brw_inst_set_3src_a16_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src)) + brw_eu_inst_set_3src_a16_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src)) uncompact(hw_opcode); @@ -2119,7 +2119,7 @@ brw_uncompact_3src_instruction(const struct compaction_state *c, uncompact_a16(src1_subreg_nr); uncompact_a16(src2_subreg_nr); } - brw_inst_set_3src_cmpt_control(devinfo, dst, false); + brw_eu_inst_set_3src_cmpt_control(devinfo, dst, false); #undef uncompact #undef uncompact_a16 @@ -2141,9 +2141,9 @@ uncompact_instruction(const struct compaction_state *c, brw_eu_inst *dst, } #define uncompact(field) \ - brw_inst_set_##field(devinfo, dst, brw_compact_inst_##field(devinfo, src)) + brw_eu_inst_set_##field(devinfo, dst, brw_compact_inst_##field(devinfo, src)) #define uncompact_reg(field) \ - brw_inst_set_##field##_da_reg_nr(devinfo, dst, \ + brw_eu_inst_set_##field##_da_reg_nr(devinfo, dst, \ brw_compact_inst_##field##_reg_nr(devinfo, src)) uncompact(hw_opcode); @@ -2158,7 +2158,7 @@ uncompact_instruction(const struct compaction_state *c, brw_eu_inst *dst, if (has_immediate(devinfo, dst, &type)) { unsigned imm = uncompact_immediate(devinfo, type, brw_compact_inst_imm(devinfo, src)); - brw_inst_set_imm_ud(devinfo, dst, imm); + brw_eu_inst_set_imm_ud(devinfo, dst, imm); } else { set_uncompacted_src1(c, dst, src); uncompact_reg(src1); @@ -2176,7 +2176,7 @@ uncompact_instruction(const struct compaction_state *c, brw_eu_inst *dst, uncompact_reg(dst); uncompact_reg(src0); } - brw_inst_set_cmpt_control(devinfo, dst, false); + brw_eu_inst_set_cmpt_control(devinfo, dst, false); #undef uncompact #undef uncompact_reg @@ -2240,24 +2240,24 @@ update_uip_jip(const struct brw_isa_info *isa, brw_eu_inst *insn, /* Even though the values are signed, we don't need the rounding behavior * of integer division. The shifts are safe. */ - assert(brw_inst_jip(devinfo, insn) % 8 == 0 && - brw_inst_uip(devinfo, insn) % 8 == 0); + assert(brw_eu_inst_jip(devinfo, insn) % 8 == 0 && + brw_eu_inst_uip(devinfo, insn) % 8 == 0); - int32_t jip_compacted = brw_inst_jip(devinfo, insn) >> shift; + int32_t jip_compacted = brw_eu_inst_jip(devinfo, insn) >> shift; jip_compacted -= compacted_between(this_old_ip, this_old_ip + (jip_compacted / 2), compacted_counts); - brw_inst_set_jip(devinfo, insn, (uint32_t)jip_compacted << shift); + brw_eu_inst_set_jip(devinfo, insn, (uint32_t)jip_compacted << shift); - if (brw_inst_opcode(isa, insn) == BRW_OPCODE_ENDIF || - brw_inst_opcode(isa, insn) == BRW_OPCODE_WHILE) + if (brw_eu_inst_opcode(isa, insn) == BRW_OPCODE_ENDIF || + brw_eu_inst_opcode(isa, insn) == BRW_OPCODE_WHILE) return; - int32_t uip_compacted = brw_inst_uip(devinfo, insn) >> shift; + int32_t uip_compacted = brw_eu_inst_uip(devinfo, insn) >> shift; uip_compacted -= compacted_between(this_old_ip, this_old_ip + (uip_compacted / 2), compacted_counts); - brw_inst_set_uip(devinfo, insn, (uint32_t)uip_compacted << shift); + brw_eu_inst_set_uip(devinfo, insn, (uint32_t)uip_compacted << shift); } static void @@ -2407,7 +2407,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, int this_old_ip = old_ip[offset / sizeof(brw_eu_compact_inst)]; int this_compacted_count = compacted_counts[this_old_ip]; - switch (brw_inst_opcode(p->isa, insn)) { + switch (brw_eu_inst_opcode(p->isa, insn)) { case BRW_OPCODE_BREAK: case BRW_OPCODE_CONTINUE: case BRW_OPCODE_HALT: @@ -2418,7 +2418,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, case BRW_OPCODE_ELSE: case BRW_OPCODE_ENDIF: case BRW_OPCODE_WHILE: - if (brw_inst_cmpt_control(devinfo, insn)) { + if (brw_eu_inst_cmpt_control(devinfo, insn)) { brw_eu_inst uncompacted; uncompact_instruction(&c, &uncompacted, (brw_eu_compact_inst *)insn); @@ -2439,20 +2439,20 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, * and Gens that use this cannot compact instructions with immediate * operands. */ - if (brw_inst_cmpt_control(devinfo, insn)) + if (brw_eu_inst_cmpt_control(devinfo, insn)) break; - if (brw_inst_dst_reg_file(devinfo, insn) == ARF && - brw_inst_dst_da_reg_nr(devinfo, insn) == BRW_ARF_IP) { - assert(brw_inst_src1_reg_file(devinfo, insn) == IMM); + if (brw_eu_inst_dst_reg_file(devinfo, insn) == ARF && + brw_eu_inst_dst_da_reg_nr(devinfo, insn) == BRW_ARF_IP) { + assert(brw_eu_inst_src1_reg_file(devinfo, insn) == IMM); int shift = 3; - int jump_compacted = brw_inst_imm_d(devinfo, insn) >> shift; + int jump_compacted = brw_eu_inst_imm_d(devinfo, insn) >> shift; int target_old_ip = this_old_ip + (jump_compacted / 2); int target_compacted_count = compacted_counts[target_old_ip]; jump_compacted -= (target_compacted_count - this_compacted_count); - brw_inst_set_imm_ud(devinfo, insn, jump_compacted << shift); + brw_eu_inst_set_imm_ud(devinfo, insn, jump_compacted << shift); } break; diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index c60b3b79e49..e62042c5488 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -56,21 +56,21 @@ brw_set_dest(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg dest) } if (devinfo->ver >= 12 && - (brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC)) { + (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC)) { assert(dest.file == FIXED_GRF || dest.file == ARF); assert(dest.address_mode == BRW_ADDRESS_DIRECT); assert(dest.subnr == 0); - assert(brw_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1 || + assert(brw_eu_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1 || (dest.hstride == BRW_HORIZONTAL_STRIDE_1 && dest.vstride == dest.width + 1)); assert(!dest.negate && !dest.abs); - brw_inst_set_dst_reg_file(devinfo, inst, dest.file); - brw_inst_set_dst_da_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); + brw_eu_inst_set_dst_reg_file(devinfo, inst, dest.file); + brw_eu_inst_set_dst_da_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); - } else if (brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC) { + } else if (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC) { assert(devinfo->ver < 12); assert(dest.file == FIXED_GRF || dest.file == ARF); @@ -79,24 +79,24 @@ brw_set_dest(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg dest) assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1 && dest.vstride == dest.width + 1); assert(!dest.negate && !dest.abs); - brw_inst_set_dst_da_reg_nr(devinfo, inst, dest.nr); - brw_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16); - brw_inst_set_send_dst_reg_file(devinfo, inst, dest.file); + brw_eu_inst_set_dst_da_reg_nr(devinfo, inst, dest.nr); + brw_eu_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16); + brw_eu_inst_set_send_dst_reg_file(devinfo, inst, dest.file); } else { - brw_inst_set_dst_file_type(devinfo, inst, dest.file, dest.type); - brw_inst_set_dst_address_mode(devinfo, inst, dest.address_mode); + brw_eu_inst_set_dst_file_type(devinfo, inst, dest.file, dest.type); + brw_eu_inst_set_dst_address_mode(devinfo, inst, dest.address_mode); if (dest.address_mode == BRW_ADDRESS_DIRECT) { - brw_inst_set_dst_da_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); + brw_eu_inst_set_dst_da_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - brw_inst_set_dst_da1_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest)); + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + brw_eu_inst_set_dst_da1_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest)); if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) dest.hstride = BRW_HORIZONTAL_STRIDE_1; - brw_inst_set_dst_hstride(devinfo, inst, dest.hstride); + brw_eu_inst_set_dst_hstride(devinfo, inst, dest.hstride); } else { - brw_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16); - brw_inst_set_da16_writemask(devinfo, inst, dest.writemask); + brw_eu_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16); + brw_eu_inst_set_da16_writemask(devinfo, inst, dest.writemask); if (dest.file == FIXED_GRF) { assert(dest.writemask != 0); } @@ -104,24 +104,24 @@ brw_set_dest(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg dest) * Although Dst.HorzStride is a don't care for Align16, HW needs * this to be programmed as "01". */ - brw_inst_set_dst_hstride(devinfo, inst, 1); + brw_eu_inst_set_dst_hstride(devinfo, inst, 1); } } else { - brw_inst_set_dst_ia_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest)); + brw_eu_inst_set_dst_ia_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest)); /* These are different sizes in align1 vs align16: */ - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - brw_inst_set_dst_ia1_addr_imm(devinfo, inst, + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + brw_eu_inst_set_dst_ia1_addr_imm(devinfo, inst, dest.indirect_offset); if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) dest.hstride = BRW_HORIZONTAL_STRIDE_1; - brw_inst_set_dst_hstride(devinfo, inst, dest.hstride); + brw_eu_inst_set_dst_hstride(devinfo, inst, dest.hstride); } else { - brw_inst_set_dst_ia16_addr_imm(devinfo, inst, + brw_eu_inst_set_dst_ia16_addr_imm(devinfo, inst, dest.indirect_offset); /* even ignored in da16, still need to set as '01' */ - brw_inst_set_dst_hstride(devinfo, inst, 1); + brw_eu_inst_set_dst_hstride(devinfo, inst, 1); } } } @@ -135,10 +135,10 @@ brw_set_src0(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) if (reg.file == FIXED_GRF) assert(reg.nr < XE2_MAX_GRF); - if (brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC) { + if (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC) { /* Any source modifiers or regions will be ignored, since this just * identifies the GRF to start reading the message contents from. * Check for some likely failures. @@ -149,8 +149,8 @@ brw_set_src0(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) } if (devinfo->ver >= 12 && - (brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC)) { + (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC)) { assert(reg.file == ARF || reg.file == FIXED_GRF); assert(reg.address_mode == BRW_ADDRESS_DIRECT); assert(has_scalar_region(reg) || @@ -158,17 +158,17 @@ brw_set_src0(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) reg.vstride == reg.width + 1)); assert(!reg.negate && !reg.abs); - brw_inst_set_send_src0_reg_file(devinfo, inst, reg.file); - brw_inst_set_src0_da_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); + brw_eu_inst_set_send_src0_reg_file(devinfo, inst, reg.file); + brw_eu_inst_set_src0_da_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); if (reg.file == ARF && reg.nr == BRW_ARF_SCALAR) { assert(reg.subnr % 2 == 0); - brw_inst_set_send_src0_subreg_nr(devinfo, inst, reg.subnr / 2); + brw_eu_inst_set_send_src0_subreg_nr(devinfo, inst, reg.subnr / 2); } else { assert(reg.subnr == 0); } - } else if (brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC) { + } else if (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC) { assert(reg.file == FIXED_GRF); assert(reg.address_mode == BRW_ADDRESS_DIRECT); assert(reg.subnr % 16 == 0); @@ -176,75 +176,75 @@ brw_set_src0(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) (reg.hstride == BRW_HORIZONTAL_STRIDE_1 && reg.vstride == reg.width + 1)); assert(!reg.negate && !reg.abs); - brw_inst_set_src0_da_reg_nr(devinfo, inst, reg.nr); - brw_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16); + brw_eu_inst_set_src0_da_reg_nr(devinfo, inst, reg.nr); + brw_eu_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16); } else { - brw_inst_set_src0_file_type(devinfo, inst, reg.file, reg.type); - brw_inst_set_src0_abs(devinfo, inst, reg.abs); - brw_inst_set_src0_negate(devinfo, inst, reg.negate); - brw_inst_set_src0_address_mode(devinfo, inst, reg.address_mode); + brw_eu_inst_set_src0_file_type(devinfo, inst, reg.file, reg.type); + brw_eu_inst_set_src0_abs(devinfo, inst, reg.abs); + brw_eu_inst_set_src0_negate(devinfo, inst, reg.negate); + brw_eu_inst_set_src0_address_mode(devinfo, inst, reg.address_mode); if (reg.file == IMM) { if (reg.type == BRW_TYPE_DF) - brw_inst_set_imm_df(devinfo, inst, reg.df); + brw_eu_inst_set_imm_df(devinfo, inst, reg.df); else if (reg.type == BRW_TYPE_UQ || reg.type == BRW_TYPE_Q) - brw_inst_set_imm_uq(devinfo, inst, reg.u64); + brw_eu_inst_set_imm_uq(devinfo, inst, reg.u64); else - brw_inst_set_imm_ud(devinfo, inst, reg.ud); + brw_eu_inst_set_imm_ud(devinfo, inst, reg.ud); if (devinfo->ver < 12 && brw_type_size_bytes(reg.type) < 8) { - brw_inst_set_src1_reg_file(devinfo, inst, + brw_eu_inst_set_src1_reg_file(devinfo, inst, ARF); - brw_inst_set_src1_reg_hw_type(devinfo, inst, - brw_inst_src0_reg_hw_type(devinfo, inst)); + brw_eu_inst_set_src1_reg_hw_type(devinfo, inst, + brw_eu_inst_src0_reg_hw_type(devinfo, inst)); } } else { if (reg.address_mode == BRW_ADDRESS_DIRECT) { - brw_inst_set_src0_da_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - brw_inst_set_src0_da1_subreg_nr(devinfo, inst, phys_subnr(devinfo, reg)); + brw_eu_inst_set_src0_da_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + brw_eu_inst_set_src0_da1_subreg_nr(devinfo, inst, phys_subnr(devinfo, reg)); } else { - brw_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16); + brw_eu_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16); } } else { - brw_inst_set_src0_ia_subreg_nr(devinfo, inst, phys_subnr(devinfo, reg)); + brw_eu_inst_set_src0_ia_subreg_nr(devinfo, inst, phys_subnr(devinfo, reg)); - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - brw_inst_set_src0_ia1_addr_imm(devinfo, inst, reg.indirect_offset); + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + brw_eu_inst_set_src0_ia1_addr_imm(devinfo, inst, reg.indirect_offset); } else { - brw_inst_set_src0_ia16_addr_imm(devinfo, inst, reg.indirect_offset); + brw_eu_inst_set_src0_ia16_addr_imm(devinfo, inst, reg.indirect_offset); } } - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { if (reg.width == BRW_WIDTH_1 && - brw_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1) { - brw_inst_set_src0_hstride(devinfo, inst, BRW_HORIZONTAL_STRIDE_0); - brw_inst_set_src0_width(devinfo, inst, BRW_WIDTH_1); - brw_inst_set_src0_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1) { + brw_eu_inst_set_src0_hstride(devinfo, inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src0_width(devinfo, inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_0); } else { - brw_inst_set_src0_hstride(devinfo, inst, reg.hstride); - brw_inst_set_src0_width(devinfo, inst, reg.width); - brw_inst_set_src0_vstride(devinfo, inst, reg.vstride); + brw_eu_inst_set_src0_hstride(devinfo, inst, reg.hstride); + brw_eu_inst_set_src0_width(devinfo, inst, reg.width); + brw_eu_inst_set_src0_vstride(devinfo, inst, reg.vstride); } } else { - brw_inst_set_src0_da16_swiz_x(devinfo, inst, + brw_eu_inst_set_src0_da16_swiz_x(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X)); - brw_inst_set_src0_da16_swiz_y(devinfo, inst, + brw_eu_inst_set_src0_da16_swiz_y(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y)); - brw_inst_set_src0_da16_swiz_z(devinfo, inst, + brw_eu_inst_set_src0_da16_swiz_z(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Z)); - brw_inst_set_src0_da16_swiz_w(devinfo, inst, + brw_eu_inst_set_src0_da16_swiz_w(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_W)); if (reg.vstride == BRW_VERTICAL_STRIDE_8) { /* This is an oddity of the fact we're using the same * descriptions for registers in align_16 as align_1: */ - brw_inst_set_src0_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_4); } else { - brw_inst_set_src0_vstride(devinfo, inst, reg.vstride); + brw_eu_inst_set_src0_vstride(devinfo, inst, reg.vstride); } } } @@ -260,11 +260,11 @@ brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) if (reg.file == FIXED_GRF) assert(reg.nr < XE2_MAX_GRF); - if (brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC || + if (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC || (devinfo->ver >= 12 && - (brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC))) { + (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC))) { assert(reg.file == FIXED_GRF || reg.file == ARF); assert(reg.address_mode == BRW_ADDRESS_DIRECT); @@ -273,8 +273,8 @@ brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) (reg.hstride == BRW_HORIZONTAL_STRIDE_1 && reg.vstride == reg.width + 1)); assert(!reg.negate && !reg.abs); - brw_inst_set_send_src1_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); - brw_inst_set_send_src1_reg_file(devinfo, inst, reg.file); + brw_eu_inst_set_send_src1_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); + brw_eu_inst_set_send_src1_reg_file(devinfo, inst, reg.file); } else { /* From the IVB PRM Vol. 4, Pt. 3, Section 3.3.3.5: * @@ -284,18 +284,18 @@ brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) assert(reg.file != ARF || (reg.nr & 0xF0) != BRW_ARF_ACCUMULATOR); - brw_inst_set_src1_file_type(devinfo, inst, reg.file, reg.type); - brw_inst_set_src1_abs(devinfo, inst, reg.abs); - brw_inst_set_src1_negate(devinfo, inst, reg.negate); + brw_eu_inst_set_src1_file_type(devinfo, inst, reg.file, reg.type); + brw_eu_inst_set_src1_abs(devinfo, inst, reg.abs); + brw_eu_inst_set_src1_negate(devinfo, inst, reg.negate); /* Only src1 can be immediate in two-argument instructions. */ - assert(brw_inst_src0_reg_file(devinfo, inst) != IMM); + assert(brw_eu_inst_src0_reg_file(devinfo, inst) != IMM); if (reg.file == IMM) { /* two-argument instructions can only use 32-bit immediates */ assert(brw_type_size_bytes(reg.type) < 8); - brw_inst_set_imm_ud(devinfo, inst, reg.ud); + brw_eu_inst_set_imm_ud(devinfo, inst, reg.ud); } else { /* This is a hardware restriction, which may or may not be lifted * in the future: @@ -303,41 +303,41 @@ brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) assert (reg.address_mode == BRW_ADDRESS_DIRECT); /* assert (reg.file == FIXED_GRF); */ - brw_inst_set_src1_da_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { - brw_inst_set_src1_da1_subreg_nr(devinfo, inst, phys_subnr(devinfo, reg)); + brw_eu_inst_set_src1_da_reg_nr(devinfo, inst, phys_nr(devinfo, reg)); + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + brw_eu_inst_set_src1_da1_subreg_nr(devinfo, inst, phys_subnr(devinfo, reg)); } else { - brw_inst_set_src1_da16_subreg_nr(devinfo, inst, reg.subnr / 16); + brw_eu_inst_set_src1_da16_subreg_nr(devinfo, inst, reg.subnr / 16); } - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { if (reg.width == BRW_WIDTH_1 && - brw_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1) { - brw_inst_set_src1_hstride(devinfo, inst, BRW_HORIZONTAL_STRIDE_0); - brw_inst_set_src1_width(devinfo, inst, BRW_WIDTH_1); - brw_inst_set_src1_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1) { + brw_eu_inst_set_src1_hstride(devinfo, inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src1_width(devinfo, inst, BRW_WIDTH_1); + brw_eu_inst_set_src1_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_0); } else { - brw_inst_set_src1_hstride(devinfo, inst, reg.hstride); - brw_inst_set_src1_width(devinfo, inst, reg.width); - brw_inst_set_src1_vstride(devinfo, inst, reg.vstride); + brw_eu_inst_set_src1_hstride(devinfo, inst, reg.hstride); + brw_eu_inst_set_src1_width(devinfo, inst, reg.width); + brw_eu_inst_set_src1_vstride(devinfo, inst, reg.vstride); } } else { - brw_inst_set_src1_da16_swiz_x(devinfo, inst, + brw_eu_inst_set_src1_da16_swiz_x(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X)); - brw_inst_set_src1_da16_swiz_y(devinfo, inst, + brw_eu_inst_set_src1_da16_swiz_y(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y)); - brw_inst_set_src1_da16_swiz_z(devinfo, inst, + brw_eu_inst_set_src1_da16_swiz_z(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Z)); - brw_inst_set_src1_da16_swiz_w(devinfo, inst, + brw_eu_inst_set_src1_da16_swiz_w(devinfo, inst, BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_W)); if (reg.vstride == BRW_VERTICAL_STRIDE_8) { /* This is an oddity of the fact we're using the same * descriptions for registers in align_16 as align_1: */ - brw_inst_set_src1_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_4); } else { - brw_inst_set_src1_vstride(devinfo, inst, reg.vstride); + brw_eu_inst_set_src1_vstride(devinfo, inst, reg.vstride); } } } @@ -353,44 +353,44 @@ brw_set_desc_ex(struct brw_codegen *p, brw_eu_inst *inst, unsigned desc, unsigned ex_desc) { const struct intel_device_info *devinfo = p->devinfo; - assert(brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || - brw_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC); + assert(brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND || + brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC); if (devinfo->ver < 12) - brw_inst_set_src1_file_type(devinfo, inst, + brw_eu_inst_set_src1_file_type(devinfo, inst, IMM, BRW_TYPE_UD); - brw_inst_set_send_desc(devinfo, inst, desc); + brw_eu_inst_set_send_desc(devinfo, inst, desc); if (devinfo->ver >= 9) - brw_inst_set_send_ex_desc(devinfo, inst, ex_desc, false); + brw_eu_inst_set_send_ex_desc(devinfo, inst, ex_desc, false); } static void -brw_inst_set_state(const struct brw_isa_info *isa, +brw_eu_inst_set_state(const struct brw_isa_info *isa, brw_eu_inst *insn, const struct brw_insn_state *state) { const struct intel_device_info *devinfo = isa->devinfo; - brw_inst_set_exec_size(devinfo, insn, state->exec_size); - brw_inst_set_group(devinfo, insn, state->group); - brw_inst_set_access_mode(devinfo, insn, state->access_mode); - brw_inst_set_mask_control(devinfo, insn, state->mask_control); + brw_eu_inst_set_exec_size(devinfo, insn, state->exec_size); + brw_eu_inst_set_group(devinfo, insn, state->group); + brw_eu_inst_set_access_mode(devinfo, insn, state->access_mode); + brw_eu_inst_set_mask_control(devinfo, insn, state->mask_control); if (devinfo->ver >= 12) - brw_inst_set_swsb(devinfo, insn, tgl_swsb_encode(devinfo, state->swsb, brw_inst_opcode(isa, insn))); - brw_inst_set_saturate(devinfo, insn, state->saturate); - brw_inst_set_pred_control(devinfo, insn, state->predicate); - brw_inst_set_pred_inv(devinfo, insn, state->pred_inv); + brw_eu_inst_set_swsb(devinfo, insn, tgl_swsb_encode(devinfo, state->swsb, brw_eu_inst_opcode(isa, insn))); + brw_eu_inst_set_saturate(devinfo, insn, state->saturate); + brw_eu_inst_set_pred_control(devinfo, insn, state->predicate); + brw_eu_inst_set_pred_inv(devinfo, insn, state->pred_inv); - if (is_3src(isa, brw_inst_opcode(isa, insn)) && + if (is_3src(isa, brw_eu_inst_opcode(isa, insn)) && state->access_mode == BRW_ALIGN_16) { - brw_inst_set_3src_a16_flag_subreg_nr(devinfo, insn, state->flag_subreg % 2); - brw_inst_set_3src_a16_flag_reg_nr(devinfo, insn, state->flag_subreg / 2); + brw_eu_inst_set_3src_a16_flag_subreg_nr(devinfo, insn, state->flag_subreg % 2); + brw_eu_inst_set_3src_a16_flag_reg_nr(devinfo, insn, state->flag_subreg / 2); } else { - brw_inst_set_flag_subreg_nr(devinfo, insn, state->flag_subreg % 2); - brw_inst_set_flag_reg_nr(devinfo, insn, state->flag_subreg / 2); + brw_eu_inst_set_flag_subreg_nr(devinfo, insn, state->flag_subreg % 2); + brw_eu_inst_set_flag_reg_nr(devinfo, insn, state->flag_subreg / 2); } if (devinfo->ver < 20) - brw_inst_set_acc_wr_control(devinfo, insn, state->acc_wr_control); + brw_eu_inst_set_acc_wr_control(devinfo, insn, state->acc_wr_control); } static brw_eu_inst * @@ -450,10 +450,10 @@ brw_next_insn(struct brw_codegen *p, unsigned opcode) brw_eu_inst *insn = brw_append_insns(p, 1, sizeof(brw_eu_inst)); memset(insn, 0, sizeof(*insn)); - brw_inst_set_opcode(p->isa, insn, opcode); + brw_eu_inst_set_opcode(p->isa, insn, opcode); /* Apply the default instruction state */ - brw_inst_set_state(p->isa, insn, p->current); + brw_eu_inst_set_state(p->isa, insn, p->current); return insn; } @@ -584,65 +584,65 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, assert(src1.address_mode == BRW_ADDRESS_DIRECT); assert(src2.address_mode == BRW_ADDRESS_DIRECT); - if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { + if (brw_eu_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { assert(dest.file == FIXED_GRF || (dest.file == ARF && (dest.nr & 0xF0) == BRW_ARF_ACCUMULATOR)); - brw_inst_set_3src_a1_dst_reg_file(devinfo, inst, dest.file); - brw_inst_set_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); - brw_inst_set_3src_a1_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest) / 8); - brw_inst_set_3src_a1_dst_hstride(devinfo, inst, BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_3src_a1_dst_reg_file(devinfo, inst, dest.file); + brw_eu_inst_set_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); + brw_eu_inst_set_3src_a1_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest) / 8); + brw_eu_inst_set_3src_a1_dst_hstride(devinfo, inst, BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1); if (brw_type_is_float(dest.type)) { - brw_inst_set_3src_a1_exec_type(devinfo, inst, + brw_eu_inst_set_3src_a1_exec_type(devinfo, inst, BRW_ALIGN1_3SRC_EXEC_TYPE_FLOAT); } else { - brw_inst_set_3src_a1_exec_type(devinfo, inst, + brw_eu_inst_set_3src_a1_exec_type(devinfo, inst, BRW_ALIGN1_3SRC_EXEC_TYPE_INT); } - brw_inst_set_3src_a1_dst_type(devinfo, inst, dest.type); - brw_inst_set_3src_a1_src0_type(devinfo, inst, src0.type); - brw_inst_set_3src_a1_src1_type(devinfo, inst, src1.type); - brw_inst_set_3src_a1_src2_type(devinfo, inst, src2.type); + brw_eu_inst_set_3src_a1_dst_type(devinfo, inst, dest.type); + brw_eu_inst_set_3src_a1_src0_type(devinfo, inst, src0.type); + brw_eu_inst_set_3src_a1_src1_type(devinfo, inst, src1.type); + brw_eu_inst_set_3src_a1_src2_type(devinfo, inst, src2.type); if (src0.file == IMM) { - brw_inst_set_3src_a1_src0_imm(devinfo, inst, src0.ud); + brw_eu_inst_set_3src_a1_src0_imm(devinfo, inst, src0.ud); } else { - brw_inst_set_3src_a1_src0_vstride( + brw_eu_inst_set_3src_a1_src0_vstride( devinfo, inst, to_3src_align1_vstride(devinfo, src0.vstride)); - brw_inst_set_3src_a1_src0_hstride(devinfo, inst, + brw_eu_inst_set_3src_a1_src0_hstride(devinfo, inst, to_3src_align1_hstride(src0.hstride)); - brw_inst_set_3src_a1_src0_subreg_nr(devinfo, inst, phys_subnr(devinfo, src0)); - brw_inst_set_3src_src0_reg_nr(devinfo, inst, phys_nr(devinfo, src0)); - brw_inst_set_3src_src0_abs(devinfo, inst, src0.abs); - brw_inst_set_3src_src0_negate(devinfo, inst, src0.negate); + brw_eu_inst_set_3src_a1_src0_subreg_nr(devinfo, inst, phys_subnr(devinfo, src0)); + brw_eu_inst_set_3src_src0_reg_nr(devinfo, inst, phys_nr(devinfo, src0)); + brw_eu_inst_set_3src_src0_abs(devinfo, inst, src0.abs); + brw_eu_inst_set_3src_src0_negate(devinfo, inst, src0.negate); } - brw_inst_set_3src_a1_src1_vstride( + brw_eu_inst_set_3src_a1_src1_vstride( devinfo, inst, to_3src_align1_vstride(devinfo, src1.vstride)); - brw_inst_set_3src_a1_src1_hstride(devinfo, inst, + brw_eu_inst_set_3src_a1_src1_hstride(devinfo, inst, to_3src_align1_hstride(src1.hstride)); - brw_inst_set_3src_a1_src1_subreg_nr(devinfo, inst, phys_subnr(devinfo, src1)); + brw_eu_inst_set_3src_a1_src1_subreg_nr(devinfo, inst, phys_subnr(devinfo, src1)); if (src1.file == ARF) { - brw_inst_set_3src_src1_reg_nr(devinfo, inst, BRW_ARF_ACCUMULATOR); + brw_eu_inst_set_3src_src1_reg_nr(devinfo, inst, BRW_ARF_ACCUMULATOR); } else { - brw_inst_set_3src_src1_reg_nr(devinfo, inst, phys_nr(devinfo, src1)); + brw_eu_inst_set_3src_src1_reg_nr(devinfo, inst, phys_nr(devinfo, src1)); } - brw_inst_set_3src_src1_abs(devinfo, inst, src1.abs); - brw_inst_set_3src_src1_negate(devinfo, inst, src1.negate); + brw_eu_inst_set_3src_src1_abs(devinfo, inst, src1.abs); + brw_eu_inst_set_3src_src1_negate(devinfo, inst, src1.negate); if (src2.file == IMM) { - brw_inst_set_3src_a1_src2_imm(devinfo, inst, src2.ud); + brw_eu_inst_set_3src_a1_src2_imm(devinfo, inst, src2.ud); } else { - brw_inst_set_3src_a1_src2_hstride(devinfo, inst, + brw_eu_inst_set_3src_a1_src2_hstride(devinfo, inst, to_3src_align1_hstride(src2.hstride)); /* no vstride on src2 */ - brw_inst_set_3src_a1_src2_subreg_nr(devinfo, inst, phys_subnr(devinfo, src2)); - brw_inst_set_3src_src2_reg_nr(devinfo, inst, phys_nr(devinfo, src2)); - brw_inst_set_3src_src2_abs(devinfo, inst, src2.abs); - brw_inst_set_3src_src2_negate(devinfo, inst, src2.negate); + brw_eu_inst_set_3src_a1_src2_subreg_nr(devinfo, inst, phys_subnr(devinfo, src2)); + brw_eu_inst_set_3src_src2_reg_nr(devinfo, inst, phys_nr(devinfo, src2)); + brw_eu_inst_set_3src_src2_abs(devinfo, inst, src2.abs); + brw_eu_inst_set_3src_src2_negate(devinfo, inst, src2.negate); } assert(src0.file == FIXED_GRF || @@ -655,22 +655,22 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, if (devinfo->ver >= 12) { if (src0.file == IMM) { - brw_inst_set_3src_a1_src0_is_imm(devinfo, inst, 1); + brw_eu_inst_set_3src_a1_src0_is_imm(devinfo, inst, 1); } else { - brw_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file); + brw_eu_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file); } - brw_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file); + brw_eu_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file); if (src2.file == IMM) { - brw_inst_set_3src_a1_src2_is_imm(devinfo, inst, 1); + brw_eu_inst_set_3src_a1_src2_is_imm(devinfo, inst, 1); } else { - brw_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file); + brw_eu_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file); } } else { - brw_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file); - brw_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file); - brw_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file); + brw_eu_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file); + brw_eu_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file); + brw_eu_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file); } } else { @@ -680,35 +680,35 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, dest.type == BRW_TYPE_D || dest.type == BRW_TYPE_UD || dest.type == BRW_TYPE_HF); - brw_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr); - brw_inst_set_3src_a16_dst_subreg_nr(devinfo, inst, dest.subnr / 4); - brw_inst_set_3src_a16_dst_writemask(devinfo, inst, dest.writemask); + brw_eu_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr); + brw_eu_inst_set_3src_a16_dst_subreg_nr(devinfo, inst, dest.subnr / 4); + brw_eu_inst_set_3src_a16_dst_writemask(devinfo, inst, dest.writemask); assert(src0.file == FIXED_GRF); - brw_inst_set_3src_a16_src0_swizzle(devinfo, inst, src0.swizzle); - brw_inst_set_3src_a16_src0_subreg_nr(devinfo, inst, src0.subnr); - brw_inst_set_3src_src0_reg_nr(devinfo, inst, src0.nr); - brw_inst_set_3src_src0_abs(devinfo, inst, src0.abs); - brw_inst_set_3src_src0_negate(devinfo, inst, src0.negate); - brw_inst_set_3src_a16_src0_rep_ctrl(devinfo, inst, + brw_eu_inst_set_3src_a16_src0_swizzle(devinfo, inst, src0.swizzle); + brw_eu_inst_set_3src_a16_src0_subreg_nr(devinfo, inst, src0.subnr); + brw_eu_inst_set_3src_src0_reg_nr(devinfo, inst, src0.nr); + brw_eu_inst_set_3src_src0_abs(devinfo, inst, src0.abs); + brw_eu_inst_set_3src_src0_negate(devinfo, inst, src0.negate); + brw_eu_inst_set_3src_a16_src0_rep_ctrl(devinfo, inst, src0.vstride == BRW_VERTICAL_STRIDE_0); assert(src1.file == FIXED_GRF); - brw_inst_set_3src_a16_src1_swizzle(devinfo, inst, src1.swizzle); - brw_inst_set_3src_a16_src1_subreg_nr(devinfo, inst, src1.subnr); - brw_inst_set_3src_src1_reg_nr(devinfo, inst, src1.nr); - brw_inst_set_3src_src1_abs(devinfo, inst, src1.abs); - brw_inst_set_3src_src1_negate(devinfo, inst, src1.negate); - brw_inst_set_3src_a16_src1_rep_ctrl(devinfo, inst, + brw_eu_inst_set_3src_a16_src1_swizzle(devinfo, inst, src1.swizzle); + brw_eu_inst_set_3src_a16_src1_subreg_nr(devinfo, inst, src1.subnr); + brw_eu_inst_set_3src_src1_reg_nr(devinfo, inst, src1.nr); + brw_eu_inst_set_3src_src1_abs(devinfo, inst, src1.abs); + brw_eu_inst_set_3src_src1_negate(devinfo, inst, src1.negate); + brw_eu_inst_set_3src_a16_src1_rep_ctrl(devinfo, inst, src1.vstride == BRW_VERTICAL_STRIDE_0); assert(src2.file == FIXED_GRF); - brw_inst_set_3src_a16_src2_swizzle(devinfo, inst, src2.swizzle); - brw_inst_set_3src_a16_src2_subreg_nr(devinfo, inst, src2.subnr); - brw_inst_set_3src_src2_reg_nr(devinfo, inst, src2.nr); - brw_inst_set_3src_src2_abs(devinfo, inst, src2.abs); - brw_inst_set_3src_src2_negate(devinfo, inst, src2.negate); - brw_inst_set_3src_a16_src2_rep_ctrl(devinfo, inst, + brw_eu_inst_set_3src_a16_src2_swizzle(devinfo, inst, src2.swizzle); + brw_eu_inst_set_3src_a16_src2_subreg_nr(devinfo, inst, src2.subnr); + brw_eu_inst_set_3src_src2_reg_nr(devinfo, inst, src2.nr); + brw_eu_inst_set_3src_src2_abs(devinfo, inst, src2.abs); + brw_eu_inst_set_3src_src2_negate(devinfo, inst, src2.negate); + brw_eu_inst_set_3src_a16_src2_rep_ctrl(devinfo, inst, src2.vstride == BRW_VERTICAL_STRIDE_0); /* Set both the source and destination types based on dest.type, @@ -717,8 +717,8 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, * may send us mixed D and UD types and want us to ignore that and use * the destination type. */ - brw_inst_set_3src_a16_src_type(devinfo, inst, dest.type); - brw_inst_set_3src_a16_dst_type(devinfo, inst, dest.type); + brw_eu_inst_set_3src_a16_src_type(devinfo, inst, dest.type); + brw_eu_inst_set_3src_a16_dst_type(devinfo, inst, dest.type); /* From the Bspec, 3D Media GPGPU, Instruction fields, srcType: * @@ -731,10 +731,10 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, * 1b = :hf. Half precision Float (16-bit)." */ if (src1.type == BRW_TYPE_HF) - brw_inst_set_3src_a16_src1_type(devinfo, inst, 1); + brw_eu_inst_set_3src_a16_src1_type(devinfo, inst, 1); if (src2.type == BRW_TYPE_HF) - brw_inst_set_3src_a16_src2_type(devinfo, inst, 1); + brw_eu_inst_set_3src_a16_src2_type(devinfo, inst, 1); } return inst; @@ -749,48 +749,48 @@ brw_dpas_three_src(struct brw_codegen *p, enum opcode opcode, brw_eu_inst *inst = next_insn(p, opcode); assert(dest.file == FIXED_GRF); - brw_inst_set_dpas_3src_dst_reg_file(devinfo, inst, + brw_eu_inst_set_dpas_3src_dst_reg_file(devinfo, inst, FIXED_GRF); - brw_inst_set_dpas_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); - brw_inst_set_dpas_3src_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest)); + brw_eu_inst_set_dpas_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); + brw_eu_inst_set_dpas_3src_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest)); if (brw_type_is_float(dest.type)) { - brw_inst_set_dpas_3src_exec_type(devinfo, inst, + brw_eu_inst_set_dpas_3src_exec_type(devinfo, inst, BRW_ALIGN1_3SRC_EXEC_TYPE_FLOAT); } else { - brw_inst_set_dpas_3src_exec_type(devinfo, inst, + brw_eu_inst_set_dpas_3src_exec_type(devinfo, inst, BRW_ALIGN1_3SRC_EXEC_TYPE_INT); } - brw_inst_set_dpas_3src_sdepth(devinfo, inst, sdepth); - brw_inst_set_dpas_3src_rcount(devinfo, inst, rcount - 1); + brw_eu_inst_set_dpas_3src_sdepth(devinfo, inst, sdepth); + brw_eu_inst_set_dpas_3src_rcount(devinfo, inst, rcount - 1); - brw_inst_set_dpas_3src_dst_type(devinfo, inst, dest.type); - brw_inst_set_dpas_3src_src0_type(devinfo, inst, src0.type); - brw_inst_set_dpas_3src_src1_type(devinfo, inst, src1.type); - brw_inst_set_dpas_3src_src2_type(devinfo, inst, src2.type); + brw_eu_inst_set_dpas_3src_dst_type(devinfo, inst, dest.type); + brw_eu_inst_set_dpas_3src_src0_type(devinfo, inst, src0.type); + brw_eu_inst_set_dpas_3src_src1_type(devinfo, inst, src1.type); + brw_eu_inst_set_dpas_3src_src2_type(devinfo, inst, src2.type); assert(src0.file == FIXED_GRF || (src0.file == ARF && src0.nr == BRW_ARF_NULL)); - brw_inst_set_dpas_3src_src0_reg_file(devinfo, inst, src0.file); - brw_inst_set_dpas_3src_src0_reg_nr(devinfo, inst, phys_nr(devinfo, src0)); - brw_inst_set_dpas_3src_src0_subreg_nr(devinfo, inst, phys_subnr(devinfo, src0)); + brw_eu_inst_set_dpas_3src_src0_reg_file(devinfo, inst, src0.file); + brw_eu_inst_set_dpas_3src_src0_reg_nr(devinfo, inst, phys_nr(devinfo, src0)); + brw_eu_inst_set_dpas_3src_src0_subreg_nr(devinfo, inst, phys_subnr(devinfo, src0)); assert(src1.file == FIXED_GRF); - brw_inst_set_dpas_3src_src1_reg_file(devinfo, inst, src1.file); - brw_inst_set_dpas_3src_src1_reg_nr(devinfo, inst, phys_nr(devinfo, src1)); - brw_inst_set_dpas_3src_src1_subreg_nr(devinfo, inst, phys_subnr(devinfo, src1)); - brw_inst_set_dpas_3src_src1_subbyte(devinfo, inst, BRW_SUB_BYTE_PRECISION_NONE); + brw_eu_inst_set_dpas_3src_src1_reg_file(devinfo, inst, src1.file); + brw_eu_inst_set_dpas_3src_src1_reg_nr(devinfo, inst, phys_nr(devinfo, src1)); + brw_eu_inst_set_dpas_3src_src1_subreg_nr(devinfo, inst, phys_subnr(devinfo, src1)); + brw_eu_inst_set_dpas_3src_src1_subbyte(devinfo, inst, BRW_SUB_BYTE_PRECISION_NONE); assert(src2.file == FIXED_GRF); - brw_inst_set_dpas_3src_src2_reg_file(devinfo, inst, src2.file); - brw_inst_set_dpas_3src_src2_reg_nr(devinfo, inst, phys_nr(devinfo, src2)); - brw_inst_set_dpas_3src_src2_subreg_nr(devinfo, inst, phys_subnr(devinfo, src2)); - brw_inst_set_dpas_3src_src2_subbyte(devinfo, inst, BRW_SUB_BYTE_PRECISION_NONE); + brw_eu_inst_set_dpas_3src_src2_reg_file(devinfo, inst, src2.file); + brw_eu_inst_set_dpas_3src_src2_reg_nr(devinfo, inst, phys_nr(devinfo, src2)); + brw_eu_inst_set_dpas_3src_src2_subreg_nr(devinfo, inst, phys_subnr(devinfo, src2)); + brw_eu_inst_set_dpas_3src_src2_subbyte(devinfo, inst, BRW_SUB_BYTE_PRECISION_NONE); return inst; } @@ -1014,13 +1014,13 @@ void brw_NOP(struct brw_codegen *p) { brw_eu_inst *insn = next_insn(p, BRW_OPCODE_NOP); memset(insn, 0, sizeof(*insn)); - brw_inst_set_opcode(p->isa, insn, BRW_OPCODE_NOP); + brw_eu_inst_set_opcode(p->isa, insn, BRW_OPCODE_NOP); } void brw_SYNC(struct brw_codegen *p, enum tgl_sync_function func) { brw_eu_inst *insn = next_insn(p, BRW_OPCODE_SYNC); - brw_inst_set_cond_modifier(p->devinfo, insn, func); + brw_eu_inst_set_cond_modifier(p->devinfo, insn, func); } /*********************************************************************** @@ -1035,10 +1035,10 @@ brw_JMPI(struct brw_codegen *p, struct brw_reg index, struct brw_reg ip = brw_ip_reg(); brw_eu_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index); - brw_inst_set_exec_size(devinfo, inst, BRW_EXECUTE_1); - brw_inst_set_qtr_control(devinfo, inst, BRW_COMPRESSION_NONE); - brw_inst_set_mask_control(devinfo, inst, BRW_MASK_DISABLE); - brw_inst_set_pred_control(devinfo, inst, predicate_control); + brw_eu_inst_set_exec_size(devinfo, inst, BRW_EXECUTE_1); + brw_eu_inst_set_qtr_control(devinfo, inst, BRW_COMPRESSION_NONE); + brw_eu_inst_set_mask_control(devinfo, inst, BRW_MASK_DISABLE); + brw_eu_inst_set_pred_control(devinfo, inst, predicate_control); return inst; } @@ -1108,13 +1108,13 @@ brw_IF(struct brw_codegen *p, unsigned execute_size) brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_TYPE_D))); if (devinfo->ver < 12) brw_set_src0(p, insn, brw_imm_d(0)); - brw_inst_set_jip(devinfo, insn, 0); - brw_inst_set_uip(devinfo, insn, 0); + brw_eu_inst_set_jip(devinfo, insn, 0); + brw_eu_inst_set_uip(devinfo, insn, 0); - brw_inst_set_exec_size(devinfo, insn, execute_size); - brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); - brw_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NORMAL); - brw_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE); + brw_eu_inst_set_exec_size(devinfo, insn, execute_size); + brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); + brw_eu_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NORMAL); + brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE); push_if_stack(p, insn); return insn; @@ -1129,27 +1129,27 @@ patch_IF_ELSE(struct brw_codegen *p, { const struct intel_device_info *devinfo = p->devinfo; - assert(if_inst != NULL && brw_inst_opcode(p->isa, if_inst) == BRW_OPCODE_IF); + assert(if_inst != NULL && brw_eu_inst_opcode(p->isa, if_inst) == BRW_OPCODE_IF); assert(endif_inst != NULL); - assert(else_inst == NULL || brw_inst_opcode(p->isa, else_inst) == BRW_OPCODE_ELSE); + assert(else_inst == NULL || brw_eu_inst_opcode(p->isa, else_inst) == BRW_OPCODE_ELSE); unsigned br = brw_jump_scale(devinfo); - assert(brw_inst_opcode(p->isa, endif_inst) == BRW_OPCODE_ENDIF); - brw_inst_set_exec_size(devinfo, endif_inst, brw_inst_exec_size(devinfo, if_inst)); + assert(brw_eu_inst_opcode(p->isa, endif_inst) == BRW_OPCODE_ENDIF); + brw_eu_inst_set_exec_size(devinfo, endif_inst, brw_eu_inst_exec_size(devinfo, if_inst)); if (else_inst == NULL) { /* Patch IF -> ENDIF */ - brw_inst_set_uip(devinfo, if_inst, br * (endif_inst - if_inst)); - brw_inst_set_jip(devinfo, if_inst, br * (endif_inst - if_inst)); + brw_eu_inst_set_uip(devinfo, if_inst, br * (endif_inst - if_inst)); + brw_eu_inst_set_jip(devinfo, if_inst, br * (endif_inst - if_inst)); } else { - brw_inst_set_exec_size(devinfo, else_inst, brw_inst_exec_size(devinfo, if_inst)); + brw_eu_inst_set_exec_size(devinfo, else_inst, brw_eu_inst_exec_size(devinfo, if_inst)); /* Patch ELSE -> ENDIF */ /* The IF instruction's JIP should point just past the ELSE */ - brw_inst_set_jip(devinfo, if_inst, br * (else_inst - if_inst + 1)); + brw_eu_inst_set_jip(devinfo, if_inst, br * (else_inst - if_inst + 1)); /* The IF instruction's UIP and ELSE's JIP should point to ENDIF */ - brw_inst_set_uip(devinfo, if_inst, br * (endif_inst - if_inst)); + brw_eu_inst_set_uip(devinfo, if_inst, br * (endif_inst - if_inst)); if (devinfo->ver < 11) { /* Set the ELSE instruction to use branch_ctrl with a join @@ -1161,17 +1161,17 @@ patch_IF_ELSE(struct brw_codegen *p, * Wa_220160235, which could cause the program to continue * running with all channels disabled. */ - brw_inst_set_jip(devinfo, else_inst, br * (endif_inst - else_inst - 1)); - brw_inst_set_branch_control(devinfo, else_inst, true); + brw_eu_inst_set_jip(devinfo, else_inst, br * (endif_inst - else_inst - 1)); + brw_eu_inst_set_branch_control(devinfo, else_inst, true); } else { - brw_inst_set_jip(devinfo, else_inst, br * (endif_inst - else_inst)); + brw_eu_inst_set_jip(devinfo, else_inst, br * (endif_inst - else_inst)); } /* Since we don't set branch_ctrl on Gfx11+, the ELSE's * JIP and UIP both should point to ENDIF on those * platforms. */ - brw_inst_set_uip(devinfo, else_inst, br * (endif_inst - else_inst)); + brw_eu_inst_set_uip(devinfo, else_inst, br * (endif_inst - else_inst)); } } @@ -1186,11 +1186,11 @@ brw_ELSE(struct brw_codegen *p) brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D)); if (devinfo->ver < 12) brw_set_src0(p, insn, brw_imm_d(0)); - brw_inst_set_jip(devinfo, insn, 0); - brw_inst_set_uip(devinfo, insn, 0); + brw_eu_inst_set_jip(devinfo, insn, 0); + brw_eu_inst_set_uip(devinfo, insn, 0); - brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); - brw_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE); + brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); + brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE); push_if_stack(p, insn); } @@ -1207,7 +1207,7 @@ brw_ENDIF(struct brw_codegen *p) assert(p->if_stack_depth > 0); if (devinfo->ver < 11 && - brw_inst_opcode(p->isa, &p->store[p->if_stack[ + brw_eu_inst_opcode(p->isa, &p->store[p->if_stack[ p->if_stack_depth - 1]]) == BRW_OPCODE_ELSE) { /* Insert a NOP to be specified as join instruction within the * ELSE block, which is valid for an ELSE instruction with @@ -1229,7 +1229,7 @@ brw_ENDIF(struct brw_codegen *p) /* Pop the IF and (optional) ELSE instructions from the stack */ tmp = pop_if_stack(p); - if (brw_inst_opcode(p->isa, tmp) == BRW_OPCODE_ELSE) { + if (brw_eu_inst_opcode(p->isa, tmp) == BRW_OPCODE_ELSE) { else_inst = tmp; tmp = pop_if_stack(p); } @@ -1237,10 +1237,10 @@ brw_ENDIF(struct brw_codegen *p) brw_set_src0(p, insn, brw_imm_d(0)); - brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); - brw_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE); + brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); + brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE); - brw_inst_set_jip(devinfo, insn, 2); + brw_eu_inst_set_jip(devinfo, insn, 2); patch_IF_ELSE(p, if_inst, else_inst, insn); } @@ -1253,8 +1253,8 @@ brw_BREAK(struct brw_codegen *p) insn = next_insn(p, BRW_OPCODE_BREAK); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D)); brw_set_src0(p, insn, brw_imm_d(0x0)); - brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); - brw_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); + brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); + brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); return insn; } @@ -1269,8 +1269,8 @@ brw_CONT(struct brw_codegen *p) brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_imm_d(0x0)); - brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); - brw_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); + brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); + brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); return insn; } @@ -1286,8 +1286,8 @@ brw_HALT(struct brw_codegen *p) brw_set_src0(p, insn, brw_imm_d(0x0)); } - brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); - brw_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); + brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); + brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); return insn; } @@ -1323,11 +1323,11 @@ brw_WHILE(struct brw_codegen *p) brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D)); if (devinfo->ver < 12) brw_set_src0(p, insn, brw_imm_d(0)); - brw_inst_set_jip(devinfo, insn, br * (do_insn - insn)); + brw_eu_inst_set_jip(devinfo, insn, br * (do_insn - insn)); - brw_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); + brw_eu_inst_set_exec_size(devinfo, insn, brw_get_default_exec_size(p)); - brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); + brw_eu_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE); p->loop_stack_depth--; @@ -1343,7 +1343,7 @@ void brw_CMP(struct brw_codegen *p, const struct intel_device_info *devinfo = p->devinfo; brw_eu_inst *insn = next_insn(p, BRW_OPCODE_CMP); - brw_inst_set_cond_modifier(devinfo, insn, conditional); + brw_eu_inst_set_cond_modifier(devinfo, insn, conditional); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); @@ -1358,7 +1358,7 @@ void brw_CMPN(struct brw_codegen *p, const struct intel_device_info *devinfo = p->devinfo; brw_eu_inst *insn = next_insn(p, BRW_OPCODE_CMPN); - brw_inst_set_cond_modifier(devinfo, insn, conditional); + brw_eu_inst_set_cond_modifier(devinfo, insn, conditional); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); @@ -1422,7 +1422,7 @@ void gfx6_math(struct brw_codegen *p, } } - brw_inst_set_math_function(devinfo, insn, function); + brw_eu_inst_set_math_function(devinfo, insn, function); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); @@ -1474,14 +1474,14 @@ brw_send_indirect_message(struct brw_codegen *p, brw_set_src0(p, send, retype(payload, BRW_TYPE_UD)); if (devinfo->ver >= 12) - brw_inst_set_send_sel_reg32_desc(devinfo, send, true); + brw_eu_inst_set_send_sel_reg32_desc(devinfo, send, true); else brw_set_src1(p, send, addr); } brw_set_dest(p, send, dst); - brw_inst_set_sfid(devinfo, send, sfid); - brw_inst_set_eot(devinfo, send, eot); + brw_eu_inst_set_sfid(devinfo, send, sfid); + brw_eu_inst_set_eot(devinfo, send, eot); } void @@ -1610,24 +1610,24 @@ brw_send_indirect_split_message(struct brw_codegen *p, brw_set_src1(p, send, retype(payload1, BRW_TYPE_UD)); if (desc.file == IMM) { - brw_inst_set_send_sel_reg32_desc(devinfo, send, 0); - brw_inst_set_send_desc(devinfo, send, desc.ud); + brw_eu_inst_set_send_sel_reg32_desc(devinfo, send, 0); + brw_eu_inst_set_send_desc(devinfo, send, desc.ud); } else { assert(desc.file == ARF); assert(desc.nr == BRW_ARF_ADDRESS); assert(desc.subnr == 0); - brw_inst_set_send_sel_reg32_desc(devinfo, send, 1); + brw_eu_inst_set_send_sel_reg32_desc(devinfo, send, 1); } if (ex_desc.file == IMM) { - brw_inst_set_send_sel_reg32_ex_desc(devinfo, send, 0); - brw_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud, false); + brw_eu_inst_set_send_sel_reg32_ex_desc(devinfo, send, 0); + brw_eu_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud, false); } else { assert(ex_desc.file == ARF); assert(ex_desc.nr == BRW_ARF_ADDRESS); assert((ex_desc.subnr & 0x3) == 0); - brw_inst_set_send_sel_reg32_ex_desc(devinfo, send, 1); - brw_inst_set_send_ex_desc_ia_subreg_nr(devinfo, send, phys_subnr(devinfo, ex_desc) >> 2); + brw_eu_inst_set_send_sel_reg32_ex_desc(devinfo, send, 1); + brw_eu_inst_set_send_ex_desc_ia_subreg_nr(devinfo, send, phys_subnr(devinfo, ex_desc) >> 2); if (devinfo->ver >= 20 && sfid == GFX12_SFID_UGM) { const unsigned ex_mlen = brw_message_ex_desc_ex_mlen(devinfo, ex_desc_imm); @@ -1642,11 +1642,11 @@ brw_send_indirect_split_message(struct brw_codegen *p, * BSpec 56890 */ if (devinfo->ver < 20 || sfid != GFX12_SFID_UGM) - brw_inst_set_send_ex_bso(devinfo, send, true); - brw_inst_set_send_src1_len(devinfo, send, GET_BITS(ex_desc_imm, 10, 6)); + brw_eu_inst_set_send_ex_bso(devinfo, send, true); + brw_eu_inst_set_send_src1_len(devinfo, send, GET_BITS(ex_desc_imm, 10, 6)); } - brw_inst_set_sfid(devinfo, send, sfid); - brw_inst_set_eot(devinfo, send, eot); + brw_eu_inst_set_sfid(devinfo, send, sfid); + brw_eu_inst_set_eot(devinfo, send, eot); } static bool @@ -1654,7 +1654,7 @@ while_jumps_before_offset(const struct intel_device_info *devinfo, brw_eu_inst *insn, int while_offset, int start_offset) { int scale = 16 / brw_jump_scale(devinfo); - int jip = brw_inst_jip(devinfo, insn); + int jip = brw_eu_inst_jip(devinfo, insn); assert(jip < 0); return while_offset + jip * scale <= start_offset; } @@ -1674,7 +1674,7 @@ brw_find_next_block_end(struct brw_codegen *p, int start_offset) offset = next_offset(devinfo, store, offset)) { brw_eu_inst *insn = store + offset; - switch (brw_inst_opcode(p->isa, insn)) { + switch (brw_eu_inst_opcode(p->isa, insn)) { case BRW_OPCODE_IF: depth++; break; @@ -1722,7 +1722,7 @@ brw_find_loop_end(struct brw_codegen *p, int start_offset) offset = next_offset(devinfo, store, offset)) { brw_eu_inst *insn = store + offset; - if (brw_inst_opcode(p->isa, insn) == BRW_OPCODE_WHILE) { + if (brw_eu_inst_opcode(p->isa, insn) == BRW_OPCODE_WHILE) { if (while_jumps_before_offset(devinfo, insn, offset, start_offset)) return offset; } @@ -1745,15 +1745,15 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset) for (offset = start_offset; offset < p->next_insn_offset; offset += 16) { brw_eu_inst *insn = store + offset; - assert(brw_inst_cmpt_control(devinfo, insn) == 0); + assert(brw_eu_inst_cmpt_control(devinfo, insn) == 0); - switch (brw_inst_opcode(p->isa, insn)) { + switch (brw_eu_inst_opcode(p->isa, insn)) { case BRW_OPCODE_BREAK: { int block_end_offset = brw_find_next_block_end(p, offset); assert(block_end_offset != 0); - brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale); + brw_eu_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale); /* Gfx7 UIP points to WHILE; Gfx6 points just after it */ - brw_inst_set_uip(devinfo, insn, + brw_eu_inst_set_uip(devinfo, insn, (brw_find_loop_end(p, offset) - offset) / scale); break; } @@ -1761,12 +1761,12 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset) case BRW_OPCODE_CONTINUE: { int block_end_offset = brw_find_next_block_end(p, offset); assert(block_end_offset != 0); - brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale); - brw_inst_set_uip(devinfo, insn, + brw_eu_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale); + brw_eu_inst_set_uip(devinfo, insn, (brw_find_loop_end(p, offset) - offset) / scale); - assert(brw_inst_uip(devinfo, insn) != 0); - assert(brw_inst_jip(devinfo, insn) != 0); + assert(brw_eu_inst_uip(devinfo, insn) != 0); + assert(brw_eu_inst_jip(devinfo, insn) != 0); break; } @@ -1774,7 +1774,7 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset) int block_end_offset = brw_find_next_block_end(p, offset); int32_t jump = (block_end_offset == 0) ? 1 * br : (block_end_offset - offset) / scale; - brw_inst_set_jip(devinfo, insn, jump); + brw_eu_inst_set_jip(devinfo, insn, jump); break; } @@ -1792,12 +1792,12 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset) */ int block_end_offset = brw_find_next_block_end(p, offset); if (block_end_offset == 0) { - brw_inst_set_jip(devinfo, insn, brw_inst_uip(devinfo, insn)); + brw_eu_inst_set_jip(devinfo, insn, brw_eu_inst_uip(devinfo, insn)); } else { - brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale); + brw_eu_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale); } - assert(brw_inst_uip(devinfo, insn) != 0); - assert(brw_inst_jip(devinfo, insn) != 0); + assert(brw_eu_inst_uip(devinfo, insn) != 0); + assert(brw_eu_inst_jip(devinfo, insn) != 0); break; } @@ -1819,24 +1819,24 @@ brw_set_memory_fence_message(struct brw_codegen *p, brw_set_desc(p, insn, brw_message_desc( devinfo, 1, (commit_enable ? 1 : 0), true)); - brw_inst_set_sfid(devinfo, insn, sfid); + brw_eu_inst_set_sfid(devinfo, insn, sfid); switch (sfid) { case GFX6_SFID_DATAPORT_RENDER_CACHE: - brw_inst_set_dp_msg_type(devinfo, insn, GFX7_DATAPORT_RC_MEMORY_FENCE); + brw_eu_inst_set_dp_msg_type(devinfo, insn, GFX7_DATAPORT_RC_MEMORY_FENCE); break; case GFX7_SFID_DATAPORT_DATA_CACHE: - brw_inst_set_dp_msg_type(devinfo, insn, GFX7_DATAPORT_DC_MEMORY_FENCE); + brw_eu_inst_set_dp_msg_type(devinfo, insn, GFX7_DATAPORT_DC_MEMORY_FENCE); break; default: unreachable("Not reached"); } if (commit_enable) - brw_inst_set_dp_msg_control(devinfo, insn, 1 << 5); + brw_eu_inst_set_dp_msg_control(devinfo, insn, 1 << 5); assert(devinfo->ver >= 11 || bti == 0); - brw_inst_set_binding_table_index(devinfo, insn, bti); + brw_eu_inst_set_binding_table_index(devinfo, insn, bti); } static void @@ -1849,7 +1849,7 @@ gfx12_set_memory_fence_message(struct brw_codegen *p, /* Completion signaled by write to register. No data returned. */ const unsigned rlen = 1 * reg_unit(p->devinfo); - brw_inst_set_sfid(p->devinfo, insn, sfid); + brw_eu_inst_set_sfid(p->devinfo, insn, sfid); /* On Gfx12.5 URB is not listed as port usable for fences with the LSC (see * BSpec 53578 for Gfx12.5, BSpec 57330 for Gfx20), so we completely ignore @@ -1909,8 +1909,8 @@ brw_memory_fence(struct brw_codegen *p, * message doesn't write anything back. */ struct brw_eu_inst *insn = next_insn(p, send_op); - brw_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); - brw_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_1); + brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); + brw_eu_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_1); brw_set_dest(p, insn, dst); brw_set_src0(p, insn, src); @@ -2066,11 +2066,11 @@ brw_barrier(struct brw_codegen *p, struct brw_reg src) brw_set_desc(p, inst, brw_message_desc(devinfo, 1 * reg_unit(devinfo), 0, false)); - brw_inst_set_sfid(devinfo, inst, BRW_SFID_MESSAGE_GATEWAY); - brw_inst_set_gateway_subfuncid(devinfo, inst, + brw_eu_inst_set_sfid(devinfo, inst, BRW_SFID_MESSAGE_GATEWAY); + brw_eu_inst_set_gateway_subfuncid(devinfo, inst, BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG); - brw_inst_set_mask_control(devinfo, inst, BRW_MASK_DISABLE); + brw_eu_inst_set_mask_control(devinfo, inst, BRW_MASK_DISABLE); brw_pop_insn_state(p); } @@ -2091,8 +2091,8 @@ brw_WAIT(struct brw_codegen *p) brw_set_src0(p, insn, src); brw_set_src1(p, insn, brw_null_reg()); - brw_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_1); - brw_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); + brw_eu_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_1); + brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); } void @@ -2114,16 +2114,16 @@ brw_float_controls_mode(struct brw_codegen *p, brw_eu_inst *inst = brw_AND(p, brw_cr0_reg(0), brw_cr0_reg(0), brw_imm_ud(~mask)); - brw_inst_set_exec_size(p->devinfo, inst, BRW_EXECUTE_1); + brw_eu_inst_set_exec_size(p->devinfo, inst, BRW_EXECUTE_1); if (p->devinfo->ver < 12) - brw_inst_set_thread_control(p->devinfo, inst, BRW_THREAD_SWITCH); + brw_eu_inst_set_thread_control(p->devinfo, inst, BRW_THREAD_SWITCH); if (mode) { brw_eu_inst *inst_or = brw_OR(p, brw_cr0_reg(0), brw_cr0_reg(0), brw_imm_ud(mode)); - brw_inst_set_exec_size(p->devinfo, inst_or, BRW_EXECUTE_1); + brw_eu_inst_set_exec_size(p->devinfo, inst_or, BRW_EXECUTE_1); if (p->devinfo->ver < 12) - brw_inst_set_thread_control(p->devinfo, inst_or, BRW_THREAD_SWITCH); + brw_eu_inst_set_thread_control(p->devinfo, inst_or, BRW_THREAD_SWITCH); } if (p->devinfo->ver >= 12) @@ -2138,13 +2138,13 @@ brw_update_reloc_imm(const struct brw_isa_info *isa, const struct intel_device_info *devinfo = isa->devinfo; /* Sanity check that the instruction is a MOV of an immediate */ - assert(brw_inst_opcode(isa, inst) == BRW_OPCODE_MOV); - assert(brw_inst_src0_reg_file(devinfo, inst) == IMM); + assert(brw_eu_inst_opcode(isa, inst) == BRW_OPCODE_MOV); + assert(brw_eu_inst_src0_reg_file(devinfo, inst) == IMM); /* If it was compacted, we can't safely rewrite */ - assert(brw_inst_cmpt_control(devinfo, inst) == 0); + assert(brw_eu_inst_cmpt_control(devinfo, inst) == 0); - brw_inst_set_imm_ud(devinfo, inst, value); + brw_eu_inst_set_imm_ud(devinfo, inst, value); } /* A default value for constants that will be patched at run-time. diff --git a/src/intel/compiler/brw_eu_inst.h b/src/intel/compiler/brw_eu_inst.h index 2bfdf4970f6..eafca065bcf 100644 --- a/src/intel/compiler/brw_eu_inst.h +++ b/src/intel/compiler/brw_eu_inst.h @@ -55,8 +55,8 @@ static inline void brw_eu_inst_set_bits(brw_eu_inst *inst, #define FC(name, hi9, lo9, hi12, lo12, assertions) \ static inline void \ -brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, uint64_t v) \ +brw_eu_inst_set_##name(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, uint64_t v) \ { \ assert(assertions); \ if (devinfo->ver >= 12) \ @@ -65,8 +65,8 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ brw_eu_inst_set_bits(inst, hi9, lo9, v); \ } \ static inline uint64_t \ -brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ assert(assertions); \ if (devinfo->ver >= 12) \ @@ -85,8 +85,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ */ #define F20(name, hi9, lo9, hi12, lo12, hi20, lo20) \ static inline void \ - brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, uint64_t v) \ + brw_eu_inst_set_##name(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 20) \ brw_eu_inst_set_bits(inst, hi20, lo20, v); \ @@ -96,8 +96,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ brw_eu_inst_set_bits(inst, hi9, lo9, v); \ } \ static inline uint64_t \ - brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ + brw_eu_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) \ return brw_eu_inst_bits(inst, hi20, lo20); \ @@ -109,8 +109,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ #define FV20(name, hi9, lo9, hi12, lo12, hi20, lo20) \ static inline void \ - brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, uint64_t v) \ + brw_eu_inst_set_##name(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 20) \ brw_eu_inst_set_bits(inst, hi20, lo20, v & 0x7); \ @@ -120,8 +120,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ brw_eu_inst_set_bits(inst, hi9, lo9, v); \ } \ static inline uint64_t \ - brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ + brw_eu_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) \ return brw_eu_inst_bits(inst, hi20, lo20) == 0x7 ? 0xF : \ @@ -134,8 +134,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ #define FD20(name, hi9, lo9, hi12, lo12, hi20, lo20, zero20) \ static inline void \ - brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, uint64_t v) \ + brw_eu_inst_set_##name(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 20) { \ brw_eu_inst_set_bits(inst, hi20, lo20, v >> 1); \ @@ -149,8 +149,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ brw_eu_inst_set_bits(inst, hi9, lo9, v); \ } \ static inline uint64_t \ - brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ + brw_eu_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) \ return (brw_eu_inst_bits(inst, hi20, lo20) << 1) | \ @@ -167,8 +167,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ */ #define FFDC(name, hi9, lo9, hi12ex, lo12ex, hi12, lo12, assertions) \ static inline void \ -brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, uint64_t value) \ +brw_eu_inst_set_##name(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, uint64_t value) \ { \ assert(assertions); \ if (devinfo->ver >= 12) { \ @@ -181,8 +181,8 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ } \ } \ static inline uint64_t \ -brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ assert(assertions); \ if (devinfo->ver >= 12) { \ @@ -237,8 +237,8 @@ hw_reg_file_to_brw_reg_file(uint64_t v) */ #define FFC(name, hi9, lo9, hi12, lo12, assertions, ...) \ static inline void \ -brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, enum brw_reg_file file) \ +brw_eu_inst_set_##name(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, enum brw_reg_file file) \ { \ assert(assertions); \ const struct { \ @@ -265,8 +265,8 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ } \ } \ static inline uint64_t \ -brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ assert(assertions); \ const struct { \ @@ -298,8 +298,8 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ */ #define FK(name, hi9, lo9, const12) \ static inline void \ -brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, uint64_t v) \ +brw_eu_inst_set_##name(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 12) \ assert(v == (const12)); \ @@ -307,8 +307,8 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ brw_eu_inst_set_bits(inst, hi9, lo9, v); \ } \ static inline uint64_t \ -brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 12) \ return (const12); \ @@ -438,10 +438,10 @@ F(3src_hw_opcode, /* 9+ */ 6, 0, /* 12+ */ 6, 0) #define F_3SRC_A16_SUBREG_NR(srcN, src_base) \ static inline void \ -brw_inst_set_3src_a16_##srcN##_subreg_nr(const struct \ - intel_device_info *devinfo, \ - brw_eu_inst *inst, \ - unsigned value) \ +brw_eu_inst_set_3src_a16_##srcN##_subreg_nr(const struct \ + intel_device_info *devinfo, \ + brw_eu_inst *inst, \ + unsigned value) \ { \ assert(devinfo->ver == 9); \ assert((value & ~0b11110) == 0); \ @@ -449,7 +449,7 @@ brw_inst_set_3src_a16_##srcN##_subreg_nr(const struct \ brw_eu_inst_set_bits(inst, src_base + 20, src_base + 20, (value >> 1) & 1); \ } \ static inline unsigned \ -brw_inst_3src_a16_##srcN##_subreg_nr(const struct \ +brw_eu_inst_3src_a16_##srcN##_subreg_nr(const struct \ intel_device_info *devinfo, \ const brw_eu_inst *inst) \ { \ @@ -465,18 +465,19 @@ F_3SRC_A16_SUBREG_NR(src2, 106) #define REG_TYPE(reg) \ static inline void \ -brw_inst_set_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, enum brw_reg_type type) \ +brw_eu_inst_set_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, \ + enum brw_reg_type type) \ { \ unsigned hw_type = brw_type_encode_for_3src(devinfo, type); \ - brw_inst_set_3src_a16_##reg##_hw_type(devinfo, inst, hw_type); \ + brw_eu_inst_set_3src_a16_##reg##_hw_type(devinfo, inst, hw_type); \ } \ \ static inline enum brw_reg_type \ -brw_inst_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ - unsigned hw_type = brw_inst_3src_a16_##reg##_hw_type(devinfo, inst); \ + unsigned hw_type = brw_eu_inst_3src_a16_##reg##_hw_type(devinfo, inst); \ return brw_type_decode_for_3src(devinfo, hw_type, 0); \ } @@ -527,29 +528,30 @@ FC(3src_a1_exec_type, /* 9+ */ 35, 35, /* 12+ */ 39, 39, devinfo->ver #define REG_TYPE(reg) \ static inline void \ -brw_inst_set_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, enum brw_reg_type type) \ +brw_eu_inst_set_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, \ + enum brw_reg_type type) \ { \ UNUSED enum gfx10_align1_3src_exec_type exec_type = \ - (enum gfx10_align1_3src_exec_type) brw_inst_3src_a1_exec_type(devinfo, \ - inst); \ - if (brw_type_is_float(type)) { \ + (enum gfx10_align1_3src_exec_type) \ + brw_eu_inst_3src_a1_exec_type(devinfo, inst); \ + if (brw_type_is_float(type)) { \ assert(exec_type == BRW_ALIGN1_3SRC_EXEC_TYPE_FLOAT); \ } else { \ assert(exec_type == BRW_ALIGN1_3SRC_EXEC_TYPE_INT); \ } \ unsigned hw_type = brw_type_encode_for_3src(devinfo, type); \ - brw_inst_set_3src_a1_##reg##_hw_type(devinfo, inst, hw_type); \ + brw_eu_inst_set_3src_a1_##reg##_hw_type(devinfo, inst, hw_type); \ } \ \ static inline enum brw_reg_type \ -brw_inst_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ enum gfx10_align1_3src_exec_type exec_type = \ - (enum gfx10_align1_3src_exec_type) brw_inst_3src_a1_exec_type(devinfo, \ - inst); \ - unsigned hw_type = brw_inst_3src_a1_##reg##_hw_type(devinfo, inst); \ + (enum gfx10_align1_3src_exec_type) \ + brw_eu_inst_3src_a1_exec_type(devinfo, inst); \ + unsigned hw_type = brw_eu_inst_3src_a1_##reg##_hw_type(devinfo, inst); \ return brw_type_decode_for_3src(devinfo, hw_type, exec_type); \ } @@ -564,7 +566,7 @@ REG_TYPE(src2) * @{ */ static inline uint16_t -brw_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, +brw_eu_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, const brw_eu_inst *insn) { assert(devinfo->ver >= 10); @@ -575,7 +577,7 @@ brw_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, } static inline uint16_t -brw_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, +brw_eu_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, const brw_eu_inst *insn) { assert(devinfo->ver >= 10); @@ -586,7 +588,7 @@ brw_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, } static inline void -brw_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, +brw_eu_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, brw_eu_inst *insn, uint16_t value) { assert(devinfo->ver >= 10); @@ -597,7 +599,7 @@ brw_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, } static inline void -brw_inst_set_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, +brw_eu_inst_set_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, brw_eu_inst *insn, uint16_t value) { assert(devinfo->ver >= 10); @@ -637,29 +639,30 @@ F(dpas_3src_dst_hw_type, /* 9+ */ -1, -1, /* 12+ */ 38, 36) #define REG_TYPE(reg) \ static inline void \ -brw_inst_set_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, enum brw_reg_type type)\ +brw_eu_inst_set_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, \ + enum brw_reg_type type) \ { \ UNUSED enum gfx10_align1_3src_exec_type exec_type = \ - (enum gfx10_align1_3src_exec_type) brw_inst_dpas_3src_exec_type(devinfo,\ - inst); \ - if (brw_type_is_float(type)) { \ + (enum gfx10_align1_3src_exec_type) \ + brw_eu_inst_dpas_3src_exec_type(devinfo, inst); \ + if (brw_type_is_float(type)) { \ assert(exec_type == BRW_ALIGN1_3SRC_EXEC_TYPE_FLOAT); \ } else { \ assert(exec_type == BRW_ALIGN1_3SRC_EXEC_TYPE_INT); \ } \ unsigned hw_type = brw_type_encode_for_3src(devinfo, type); \ - brw_inst_set_dpas_3src_##reg##_hw_type(devinfo, inst, hw_type); \ + brw_eu_inst_set_dpas_3src_##reg##_hw_type(devinfo, inst, hw_type); \ } \ \ static inline enum brw_reg_type \ -brw_inst_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ enum gfx10_align1_3src_exec_type exec_type = \ - (enum gfx10_align1_3src_exec_type) brw_inst_dpas_3src_exec_type(devinfo,\ - inst); \ - unsigned hw_type = brw_inst_dpas_3src_##reg##_hw_type(devinfo, inst); \ + (enum gfx10_align1_3src_exec_type) \ + brw_eu_inst_dpas_3src_exec_type(devinfo, inst); \ + unsigned hw_type = brw_eu_inst_dpas_3src_##reg##_hw_type(devinfo, inst); \ return brw_type_decode_for_3src(devinfo, hw_type, exec_type); \ } @@ -674,33 +677,33 @@ REG_TYPE(src2) * @{ */ static inline void -brw_inst_set_uip(const struct intel_device_info *devinfo, +brw_eu_inst_set_uip(const struct intel_device_info *devinfo, brw_eu_inst *inst, int32_t value) { if (devinfo->ver >= 12) - brw_inst_set_src1_is_imm(devinfo, inst, 1); + brw_eu_inst_set_src1_is_imm(devinfo, inst, 1); brw_eu_inst_set_bits(inst, 95, 64, (uint32_t)value); } static inline int32_t -brw_inst_uip(const struct intel_device_info *devinfo, const brw_eu_inst *inst) +brw_eu_inst_uip(const struct intel_device_info *devinfo, const brw_eu_inst *inst) { return brw_eu_inst_bits(inst, 95, 64); } static inline void -brw_inst_set_jip(const struct intel_device_info *devinfo, +brw_eu_inst_set_jip(const struct intel_device_info *devinfo, brw_eu_inst *inst, int32_t value) { if (devinfo->ver >= 12) - brw_inst_set_src0_is_imm(devinfo, inst, 1); + brw_eu_inst_set_src0_is_imm(devinfo, inst, 1); brw_eu_inst_set_bits(inst, 127, 96, (uint32_t)value); } static inline int32_t -brw_inst_jip(const struct intel_device_info *devinfo, const brw_eu_inst *inst) +brw_eu_inst_jip(const struct intel_device_info *devinfo, const brw_eu_inst *inst) { return brw_eu_inst_bits(inst, 127, 96); } @@ -745,7 +748,7 @@ FC(send_src0_subreg_nr, /* 9+ */ -1, -1, /* 12+ */ 103, 99, devinfo->verx * separately. */ static inline void -brw_inst_set_send_desc(const struct intel_device_info *devinfo, +brw_eu_inst_set_send_desc(const struct intel_device_info *devinfo, brw_eu_inst *inst, uint32_t value) { if (devinfo->ver >= 12) { @@ -763,10 +766,10 @@ brw_inst_set_send_desc(const struct intel_device_info *devinfo, /** * Get the SEND(C) message descriptor immediate. * - * \sa brw_inst_set_send_desc(). + * \sa brw_eu_inst_set_send_desc(). */ static inline uint32_t -brw_inst_send_desc(const struct intel_device_info *devinfo, +brw_eu_inst_send_desc(const struct intel_device_info *devinfo, const brw_eu_inst *inst) { if (devinfo->ver >= 12) { @@ -790,8 +793,8 @@ brw_inst_send_desc(const struct intel_device_info *devinfo, * separately. */ static inline void -brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo, - brw_eu_inst *inst, uint32_t value, bool gather) +brw_eu_inst_set_send_ex_desc(const struct intel_device_info *devinfo, + brw_eu_inst *inst, uint32_t value, bool gather) { assert(!gather || devinfo->ver >= 30); @@ -832,11 +835,11 @@ brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo, * separately. */ static inline void -brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo, - brw_eu_inst *inst, uint32_t value, bool gather) +brw_eu_inst_set_sends_ex_desc(const struct intel_device_info *devinfo, + brw_eu_inst *inst, uint32_t value, bool gather) { if (devinfo->ver >= 12) { - brw_inst_set_send_ex_desc(devinfo, inst, value, gather); + brw_eu_inst_set_send_ex_desc(devinfo, inst, value, gather); } else { brw_eu_inst_set_bits(inst, 95, 80, GET_BITS(value, 31, 16)); assert(GET_BITS(value, 15, 10) == 0); @@ -848,11 +851,11 @@ brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo, /** * Get the SEND(C) message extended descriptor immediate. * - * \sa brw_inst_set_send_ex_desc(). + * \sa brw_eu_inst_set_send_ex_desc(). */ static inline uint32_t -brw_inst_send_ex_desc(const struct intel_device_info *devinfo, - const brw_eu_inst *inst, bool gather) +brw_eu_inst_send_ex_desc(const struct intel_device_info *devinfo, + const brw_eu_inst *inst, bool gather) { assert(!gather || devinfo->ver >= 30); @@ -874,14 +877,14 @@ brw_inst_send_ex_desc(const struct intel_device_info *devinfo, /** * Get the SENDS(C) message extended descriptor immediate. * - * \sa brw_inst_set_send_ex_desc(). + * \sa brw_eu_inst_set_send_ex_desc(). */ static inline uint32_t -brw_inst_sends_ex_desc(const struct intel_device_info *devinfo, - const brw_eu_inst *inst, bool gather) +brw_eu_inst_sends_ex_desc(const struct intel_device_info *devinfo, + const brw_eu_inst *inst, bool gather) { if (devinfo->ver >= 12) { - return brw_inst_send_ex_desc(devinfo, inst, gather); + return brw_eu_inst_send_ex_desc(devinfo, inst, gather); } else { assert(!gather); return (brw_eu_inst_bits(inst, 95, 80) << 16 | @@ -979,21 +982,21 @@ F(pi_message_data, /* 9+ */ MD(7), MD(0), /* 12+ */ MD12(7), MD12(0)) * @{ */ static inline int -brw_inst_imm_d(const struct intel_device_info *devinfo, const brw_eu_inst *insn) +brw_eu_inst_imm_d(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { (void) devinfo; return brw_eu_inst_bits(insn, 127, 96); } static inline unsigned -brw_inst_imm_ud(const struct intel_device_info *devinfo, const brw_eu_inst *insn) +brw_eu_inst_imm_ud(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { (void) devinfo; return brw_eu_inst_bits(insn, 127, 96); } static inline uint64_t -brw_inst_imm_uq(const struct intel_device_info *devinfo, +brw_eu_inst_imm_uq(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { if (devinfo->ver >= 12) { @@ -1005,7 +1008,7 @@ brw_inst_imm_uq(const struct intel_device_info *devinfo, } static inline float -brw_inst_imm_f(const struct intel_device_info *devinfo, const brw_eu_inst *insn) +brw_eu_inst_imm_f(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { union { float f; @@ -1017,18 +1020,18 @@ brw_inst_imm_f(const struct intel_device_info *devinfo, const brw_eu_inst *insn) } static inline double -brw_inst_imm_df(const struct intel_device_info *devinfo, const brw_eu_inst *insn) +brw_eu_inst_imm_df(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { union { double d; uint64_t u; } dt; - dt.u = brw_inst_imm_uq(devinfo, insn); + dt.u = brw_eu_inst_imm_uq(devinfo, insn); return dt.d; } static inline void -brw_inst_set_imm_d(const struct intel_device_info *devinfo, +brw_eu_inst_set_imm_d(const struct intel_device_info *devinfo, brw_eu_inst *insn, int value) { (void) devinfo; @@ -1036,7 +1039,7 @@ brw_inst_set_imm_d(const struct intel_device_info *devinfo, } static inline void -brw_inst_set_imm_ud(const struct intel_device_info *devinfo, +brw_eu_inst_set_imm_ud(const struct intel_device_info *devinfo, brw_eu_inst *insn, unsigned value) { (void) devinfo; @@ -1044,7 +1047,7 @@ brw_inst_set_imm_ud(const struct intel_device_info *devinfo, } static inline void -brw_inst_set_imm_f(const struct intel_device_info *devinfo, +brw_eu_inst_set_imm_f(const struct intel_device_info *devinfo, brw_eu_inst *insn, float value) { union { @@ -1057,7 +1060,7 @@ brw_inst_set_imm_f(const struct intel_device_info *devinfo, } static inline void -brw_inst_set_imm_df(const struct intel_device_info *devinfo, +brw_eu_inst_set_imm_df(const struct intel_device_info *devinfo, brw_eu_inst *insn, double value) { union { @@ -1076,7 +1079,7 @@ brw_inst_set_imm_df(const struct intel_device_info *devinfo, } static inline void -brw_inst_set_imm_uq(const struct intel_device_info *devinfo, +brw_eu_inst_set_imm_uq(const struct intel_device_info *devinfo, brw_eu_inst *insn, uint64_t value) { (void) devinfo; @@ -1092,24 +1095,24 @@ brw_inst_set_imm_uq(const struct intel_device_info *devinfo, #define REG_TYPE(reg) \ static inline void \ -brw_inst_set_##reg##_file_type(const struct intel_device_info *devinfo, \ - brw_eu_inst *inst, enum brw_reg_file file, \ - enum brw_reg_type type) \ +brw_eu_inst_set_##reg##_file_type(const struct intel_device_info *devinfo, \ + brw_eu_inst *inst, enum brw_reg_file file, \ + enum brw_reg_type type) \ { \ - assert(file <= IMM); \ + assert(file <= IMM); \ unsigned hw_type = brw_type_encode(devinfo, file, type); \ - brw_inst_set_##reg##_reg_file(devinfo, inst, file); \ - brw_inst_set_##reg##_reg_hw_type(devinfo, inst, hw_type); \ + brw_eu_inst_set_##reg##_reg_file(devinfo, inst, file); \ + brw_eu_inst_set_##reg##_reg_hw_type(devinfo, inst, hw_type); \ } \ \ static inline enum brw_reg_type \ -brw_inst_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_##reg##_type(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ unsigned file = __builtin_strcmp("dst", #reg) == 0 ? \ - (unsigned) FIXED_GRF : \ - brw_inst_##reg##_reg_file(devinfo, inst); \ - unsigned hw_type = brw_inst_##reg##_reg_hw_type(devinfo, inst); \ + (unsigned) FIXED_GRF : \ + brw_eu_inst_##reg##_reg_file(devinfo, inst); \ + unsigned hw_type = brw_eu_inst_##reg##_reg_hw_type(devinfo, inst); \ return brw_type_decode(devinfo, (enum brw_reg_file)file, hw_type); \ } @@ -1123,10 +1126,10 @@ REG_TYPE(src1) #define BRW_IA1_ADDR_IMM(reg, g9_nine, g9_high, g9_low, \ g12_high, g12_low, g20_high, g20_low, g20_zero) \ static inline void \ -brw_inst_set_##reg##_ia1_addr_imm(const struct \ - intel_device_info *devinfo, \ - brw_eu_inst *inst, \ - unsigned value) \ +brw_eu_inst_set_##reg##_ia1_addr_imm(const struct \ + intel_device_info *devinfo, \ + brw_eu_inst *inst, \ + unsigned value) \ { \ if (devinfo->ver >= 20) { \ assert((value & ~0x7ff) == 0); \ @@ -1145,8 +1148,8 @@ brw_inst_set_##reg##_ia1_addr_imm(const struct \ } \ } \ static inline unsigned \ -brw_inst_##reg##_ia1_addr_imm(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_##reg##_ia1_addr_imm(const struct intel_device_info *devinfo,\ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) { \ return brw_eu_inst_bits(inst, g20_high, g20_low) << 1 | \ @@ -1168,9 +1171,9 @@ BRW_IA1_ADDR_IMM(dst, 47, 56, 48, 59, 50, 59, 50, 33) #define BRW_IA16_ADDR_IMM(reg, g9_nine, g9_high, g9_low) \ static inline void \ -brw_inst_set_##reg##_ia16_addr_imm(const struct \ - intel_device_info *devinfo, \ - brw_eu_inst *inst, unsigned value) \ +brw_eu_inst_set_##reg##_ia16_addr_imm(const struct \ + intel_device_info *devinfo, \ + brw_eu_inst *inst, unsigned value) \ { \ assert(devinfo->ver < 12); \ assert((value & ~0x3ff) == 0); \ @@ -1179,8 +1182,8 @@ brw_inst_set_##reg##_ia16_addr_imm(const struct \ brw_eu_inst_set_bits(inst, g9_nine, g9_nine, GET_BITS(value, 9, 9)); \ } \ static inline unsigned \ -brw_inst_##reg##_ia16_addr_imm(const struct intel_device_info *devinfo, \ - const brw_eu_inst *inst) \ +brw_eu_inst_##reg##_ia16_addr_imm(const struct intel_device_info *devinfo,\ + const brw_eu_inst *inst) \ { \ assert(devinfo->ver < 12); \ return (brw_eu_inst_bits(inst, g9_high, g9_low) << 4) | \ @@ -1436,17 +1439,17 @@ F(3src_hw_opcode, /* 9+ */ 6, 0, /* 12+ */ 6, 0) #undef F static inline void -brw_inst_set_opcode(const struct brw_isa_info *isa, +brw_eu_inst_set_opcode(const struct brw_isa_info *isa, struct brw_eu_inst *inst, enum opcode opcode) { - brw_inst_set_hw_opcode(isa->devinfo, inst, brw_opcode_encode(isa, opcode)); + brw_eu_inst_set_hw_opcode(isa->devinfo, inst, brw_opcode_encode(isa, opcode)); } static inline enum opcode -brw_inst_opcode(const struct brw_isa_info *isa, +brw_eu_inst_opcode(const struct brw_isa_info *isa, const struct brw_eu_inst *inst) { - return brw_opcode_decode(isa, brw_inst_hw_opcode(isa->devinfo, inst)); + return brw_opcode_decode(isa, brw_eu_inst_hw_opcode(isa->devinfo, inst)); } #ifdef __cplusplus diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c index 8d495e2ff00..5ea0aaa4396 100644 --- a/src/intel/compiler/brw_eu_validate.c +++ b/src/intel/compiler/brw_eu_validate.c @@ -256,9 +256,9 @@ invalid_values(const struct brw_isa_info *isa, const brw_hw_decoded_inst *inst) struct string error_msg = { .str = NULL, .len = 0 }; if (devinfo->ver >= 12) { - unsigned qtr_ctrl = brw_inst_qtr_control(devinfo, inst->raw); + unsigned qtr_ctrl = brw_eu_inst_qtr_control(devinfo, inst->raw); unsigned nib_ctrl = - devinfo->ver == 12 ? brw_inst_nib_control(devinfo, inst->raw) : 0; + devinfo->ver == 12 ? brw_eu_inst_nib_control(devinfo, inst->raw) : 0; unsigned chan_off = (qtr_ctrl * 2 + nib_ctrl) << 2; ERROR_IF(chan_off % inst->exec_size != 0, @@ -328,10 +328,10 @@ send_restrictions(const struct brw_isa_info *isa, "src1 of split send must be a GRF or NULL"); if (devinfo->ver < 30) { - ERROR_IF(brw_inst_eot(devinfo, inst->raw) && + ERROR_IF(brw_eu_inst_eot(devinfo, inst->raw) && inst->src[0].nr < 112, "send with EOT must use g112-g127"); - ERROR_IF(brw_inst_eot(devinfo, inst->raw) && + ERROR_IF(brw_eu_inst_eot(devinfo, inst->raw) && inst->src[1].file == FIXED_GRF && inst->src[1].nr < 112, "send with EOT must use g112-g127"); @@ -340,14 +340,14 @@ send_restrictions(const struct brw_isa_info *isa, if (inst->src[0].file == FIXED_GRF && inst->src[1].file == FIXED_GRF) { /* Assume minimums if we don't know */ unsigned mlen = 1; - if (!brw_inst_send_sel_reg32_desc(devinfo, inst->raw)) { - const uint32_t desc = brw_inst_send_desc(devinfo, inst->raw); + if (!brw_eu_inst_send_sel_reg32_desc(devinfo, inst->raw)) { + const uint32_t desc = brw_eu_inst_send_desc(devinfo, inst->raw); mlen = brw_message_desc_mlen(devinfo, desc) / reg_unit(devinfo); } unsigned ex_mlen = 1; - if (!brw_inst_send_sel_reg32_ex_desc(devinfo, inst->raw)) { - const uint32_t ex_desc = brw_inst_sends_ex_desc(devinfo, inst->raw, false); + if (!brw_eu_inst_send_sel_reg32_ex_desc(devinfo, inst->raw)) { + const uint32_t ex_desc = brw_eu_inst_sends_ex_desc(devinfo, inst->raw, false); ex_mlen = brw_message_ex_desc_ex_mlen(devinfo, ex_desc) / reg_unit(devinfo); } @@ -365,13 +365,13 @@ send_restrictions(const struct brw_isa_info *isa, ERROR_IF(inst->src[0].file != FIXED_GRF, "send from non-GRF"); - ERROR_IF(brw_inst_eot(devinfo, inst->raw) && + ERROR_IF(brw_eu_inst_eot(devinfo, inst->raw) && inst->src[0].nr < 112, "send with EOT must use g112-g127"); ERROR_IF(!dst_is_null(inst) && - (inst->dst.nr + brw_inst_rlen(devinfo, inst->raw) > 127) && - (inst->src[0].nr + brw_inst_mlen(devinfo, inst->raw) > inst->dst.nr), + (inst->dst.nr + brw_eu_inst_rlen(devinfo, inst->raw) > 127) && + (inst->src[0].nr + brw_eu_inst_mlen(devinfo, inst->raw) > inst->dst.nr), "r127 must not be used for return address when there is " "a src and dest overlap"); } @@ -383,7 +383,7 @@ static bool is_unsupported_inst(const struct brw_isa_info *isa, const brw_eu_inst *inst) { - return brw_inst_opcode(isa, inst) == BRW_OPCODE_ILLEGAL; + return brw_eu_inst_opcode(isa, inst) == BRW_OPCODE_ILLEGAL; } /** @@ -652,15 +652,15 @@ general_restrictions_based_on_operand_types(const struct brw_isa_info *isa, */ switch (s) { case 0: - ERROR_IF(brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst->raw), + ERROR_IF(brw_eu_inst_3src_a16_src0_rep_ctrl(devinfo, inst->raw), "RepCtrl must be zero for 64-bit source 0"); break; case 1: - ERROR_IF(brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst->raw), + ERROR_IF(brw_eu_inst_3src_a16_src1_rep_ctrl(devinfo, inst->raw), "RepCtrl must be zero for 64-bit source 1"); break; case 2: - ERROR_IF(brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst->raw), + ERROR_IF(brw_eu_inst_3src_a16_src2_rep_ctrl(devinfo, inst->raw), "RepCtrl must be zero for 64-bit source 2"); break; default: unreachable("invalid src"); @@ -1581,7 +1581,7 @@ special_requirements_for_handling_double_precision_data_types( if (is_double_precision && intel_device_info_is_9lp(devinfo)) { ERROR_IF(inst->opcode == BRW_OPCODE_MAC || - brw_inst_acc_wr_control(devinfo, inst->raw) || + brw_eu_inst_acc_wr_control(devinfo, inst->raw) || (ARF == file && reg != BRW_ARF_NULL) || (ARF == inst->dst.file && @@ -1680,8 +1680,8 @@ special_requirements_for_handling_double_precision_data_types( */ if (is_double_precision && intel_device_info_is_9lp(devinfo)) { - ERROR_IF(brw_inst_no_dd_check(devinfo, inst->raw) || - brw_inst_no_dd_clear(devinfo, inst->raw), + ERROR_IF(brw_eu_inst_no_dd_check(devinfo, inst->raw) || + brw_eu_inst_no_dd_clear(devinfo, inst->raw), "DepCtrl is not allowed when the execution type is 64-bit"); } @@ -1795,7 +1795,7 @@ instruction_restrictions(const struct brw_isa_info *isa, } if (inst->opcode == BRW_OPCODE_MATH) { - unsigned math_function = brw_inst_math_function(devinfo, inst->raw); + unsigned math_function = brw_eu_inst_math_function(devinfo, inst->raw); switch (math_function) { case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER: case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT: @@ -1969,7 +1969,7 @@ instruction_restrictions(const struct brw_isa_info *isa, } if (inst->opcode == BRW_OPCODE_DPAS) { - ERROR_IF(brw_inst_dpas_3src_sdepth(devinfo, inst->raw) != BRW_SYSTOLIC_DEPTH_8, + ERROR_IF(brw_eu_inst_dpas_3src_sdepth(devinfo, inst->raw) != BRW_SYSTOLIC_DEPTH_8, "Systolic depth must be 8."); const unsigned sdepth = 8; @@ -1980,7 +1980,7 @@ instruction_restrictions(const struct brw_isa_info *isa, const enum brw_reg_type src2_type = inst->src[2].type; const enum gfx12_sub_byte_precision src1_sub_byte = - brw_inst_dpas_3src_src1_subbyte(devinfo, inst->raw); + brw_eu_inst_dpas_3src_src1_subbyte(devinfo, inst->raw); if (src1_type != BRW_TYPE_B && src1_type != BRW_TYPE_UB) { ERROR_IF(src1_sub_byte != BRW_SUB_BYTE_PRECISION_NONE, @@ -1993,7 +1993,7 @@ instruction_restrictions(const struct brw_isa_info *isa, } const enum gfx12_sub_byte_precision src2_sub_byte = - brw_inst_dpas_3src_src2_subbyte(devinfo, inst->raw); + brw_eu_inst_dpas_3src_src2_subbyte(devinfo, inst->raw); if (src2_type != BRW_TYPE_B && src2_type != BRW_TYPE_UB) { ERROR_IF(src2_sub_byte != BRW_SUB_BYTE_PRECISION_NONE, @@ -2007,11 +2007,11 @@ instruction_restrictions(const struct brw_isa_info *isa, const unsigned src1_bits_per_element = brw_type_size_bits(src1_type) >> - brw_inst_dpas_3src_src1_subbyte(devinfo, inst->raw); + brw_eu_inst_dpas_3src_src1_subbyte(devinfo, inst->raw); const unsigned src2_bits_per_element = brw_type_size_bits(src2_type) >> - brw_inst_dpas_3src_src2_subbyte(devinfo, inst->raw); + brw_eu_inst_dpas_3src_src2_subbyte(devinfo, inst->raw); /* The MAX2(1, ...) is just to prevent possible division by 0 later. */ const unsigned ops_per_chan = @@ -2059,7 +2059,7 @@ instruction_restrictions(const struct brw_isa_info *isa, ERROR_IF((src2_subnr * brw_type_size_bytes(src2_type) * src2_bits_per_element) / 8 >= REG_SIZE, "Src2 subregister specifies next register."); - if (brw_inst_3src_atomic_control(devinfo, inst->raw)) { + if (brw_eu_inst_3src_atomic_control(devinfo, inst->raw)) { /* FINISHME: When we start emitting DPAS with Atomic set, figure out * a way to validate it. Also add a test in test_eu_validate.cpp. */ @@ -2068,7 +2068,7 @@ instruction_restrictions(const struct brw_isa_info *isa, "DPAS instruction."); } - if (brw_inst_dpas_3src_exec_type(devinfo, inst->raw) == + if (brw_eu_inst_dpas_3src_exec_type(devinfo, inst->raw) == BRW_ALIGN1_3SRC_EXEC_TYPE_FLOAT) { ERROR_IF(dst_type != BRW_TYPE_F, "DPAS destination type must be F."); @@ -2124,7 +2124,7 @@ send_descriptor_restrictions(const struct brw_isa_info *isa, if (inst_is_split_send(isa, inst)) { /* We can only validate immediate descriptors */ - if (brw_inst_send_sel_reg32_desc(devinfo, inst->raw)) + if (brw_eu_inst_send_sel_reg32_desc(devinfo, inst->raw)) return error_msg; } else if (inst_is_send(inst)) { /* We can only validate immediate descriptors */ @@ -2134,9 +2134,9 @@ send_descriptor_restrictions(const struct brw_isa_info *isa, return error_msg; } - const uint32_t desc = brw_inst_send_desc(devinfo, inst->raw); + const uint32_t desc = brw_eu_inst_send_desc(devinfo, inst->raw); - switch (brw_inst_sfid(devinfo, inst->raw)) { + switch (brw_eu_inst_sfid(devinfo, inst->raw)) { case BRW_SFID_URB: if (devinfo->ver < 20) break; @@ -2156,11 +2156,11 @@ send_descriptor_restrictions(const struct brw_isa_info *isa, break; } - if (brw_inst_sfid(devinfo, inst->raw) == BRW_SFID_URB && devinfo->ver < 20) { - ERROR_IF(!brw_inst_header_present(devinfo, inst->raw), + if (brw_eu_inst_sfid(devinfo, inst->raw) == BRW_SFID_URB && devinfo->ver < 20) { + ERROR_IF(!brw_eu_inst_header_present(devinfo, inst->raw), "Header must be present for all URB messages."); - switch (brw_inst_urb_opcode(devinfo, inst->raw)) { + switch (brw_eu_inst_urb_opcode(devinfo, inst->raw)) { case GFX7_URB_OPCODE_ATOMIC_INC: case GFX7_URB_OPCODE_ATOMIC_MOV: case GFX8_URB_OPCODE_ATOMIC_ADD: @@ -2168,7 +2168,7 @@ send_descriptor_restrictions(const struct brw_isa_info *isa, break; case GFX8_URB_OPCODE_SIMD8_READ: - ERROR_IF(brw_inst_rlen(devinfo, inst->raw) == 0, + ERROR_IF(brw_eu_inst_rlen(devinfo, inst->raw) == 0, "URB SIMD8 read message must read some data."); break; @@ -2440,14 +2440,14 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, struct string error_msg = { .str = NULL, .len = 0 }; inst->raw = raw; - inst->opcode = brw_inst_opcode(isa, raw); + inst->opcode = brw_eu_inst_opcode(isa, raw); inst->num_sources = brw_num_sources_from_inst(isa, raw); const struct opcode_desc *desc = brw_opcode_desc(isa, inst->opcode); assert(desc->ndst == 0 || desc->ndst == 1); inst->has_dst = desc->ndst == 1; - enum brw_execution_size exec_size = brw_inst_exec_size(devinfo, raw); + enum brw_execution_size exec_size = brw_eu_inst_exec_size(devinfo, raw); switch (exec_size) { case BRW_EXECUTE_1: case BRW_EXECUTE_2: @@ -2462,8 +2462,8 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, break; } - inst->access_mode = brw_inst_access_mode(devinfo, raw); - inst->pred_control = brw_inst_pred_control(devinfo, raw); + inst->access_mode = brw_eu_inst_access_mode(devinfo, raw); + inst->pred_control = brw_eu_inst_pred_control(devinfo, raw); RETURN_ERROR_IF(inst->num_sources == 3 && inst->access_mode == BRW_ALIGN_1 && devinfo->ver == 9, "Align1 mode not allowed on Gfx9 for 3-src instructions"); @@ -2529,67 +2529,67 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, inst->opcode == BRW_OPCODE_SYNC); if (inst->has_dst) { - inst->dst.file = brw_inst_dst_reg_file(devinfo, raw); - inst->dst.type = brw_inst_dst_type(devinfo, raw); - inst->dst.address_mode = brw_inst_dst_address_mode(devinfo, raw); + inst->dst.file = brw_eu_inst_dst_reg_file(devinfo, raw); + inst->dst.type = brw_eu_inst_dst_type(devinfo, raw); + inst->dst.address_mode = brw_eu_inst_dst_address_mode(devinfo, raw); if (inst->dst.address_mode == BRW_ADDRESS_DIRECT) { - inst->dst.nr = brw_inst_dst_da_reg_nr(devinfo, raw); + inst->dst.nr = brw_eu_inst_dst_da_reg_nr(devinfo, raw); if (inst->access_mode == BRW_ALIGN_1) { - inst->dst.subnr = brw_inst_dst_da1_subreg_nr(devinfo, raw); + inst->dst.subnr = brw_eu_inst_dst_da1_subreg_nr(devinfo, raw); } else { - inst->dst.subnr = brw_inst_dst_da16_subreg_nr(devinfo, raw); + inst->dst.subnr = brw_eu_inst_dst_da16_subreg_nr(devinfo, raw); } } else { - inst->dst.subnr = brw_inst_dst_ia_subreg_nr(devinfo, raw); + inst->dst.subnr = brw_eu_inst_dst_ia_subreg_nr(devinfo, raw); } - inst->dst.hstride = STRIDE(brw_inst_dst_hstride(devinfo, raw)); + inst->dst.hstride = STRIDE(brw_eu_inst_dst_hstride(devinfo, raw)); } - inst->src[0].file = brw_inst_src0_reg_file(devinfo, raw); - inst->src[0].type = brw_inst_src0_type(devinfo, raw); - inst->src[0].address_mode = brw_inst_src0_address_mode(devinfo, raw); - inst->src[0].negate = brw_inst_src0_negate(devinfo, raw); - inst->src[0].abs = brw_inst_src0_abs(devinfo, raw); + inst->src[0].file = brw_eu_inst_src0_reg_file(devinfo, raw); + inst->src[0].type = brw_eu_inst_src0_type(devinfo, raw); + inst->src[0].address_mode = brw_eu_inst_src0_address_mode(devinfo, raw); + inst->src[0].negate = brw_eu_inst_src0_negate(devinfo, raw); + inst->src[0].abs = brw_eu_inst_src0_abs(devinfo, raw); if (inst->src[0].file != IMM) { if (inst->src[0].address_mode == BRW_ADDRESS_DIRECT) { - inst->src[0].nr = brw_inst_src0_da_reg_nr(devinfo, raw); + inst->src[0].nr = brw_eu_inst_src0_da_reg_nr(devinfo, raw); if (inst->access_mode == BRW_ALIGN_1) { - inst->src[0].subnr = brw_inst_src0_da1_subreg_nr(devinfo, raw); + inst->src[0].subnr = brw_eu_inst_src0_da1_subreg_nr(devinfo, raw); } else { - inst->src[0].subnr = brw_inst_src0_da16_subreg_nr(devinfo, raw) * 16; + inst->src[0].subnr = brw_eu_inst_src0_da16_subreg_nr(devinfo, raw) * 16; } } else { - inst->src[0].subnr = brw_inst_src0_ia_subreg_nr(devinfo, raw); + inst->src[0].subnr = brw_eu_inst_src0_ia_subreg_nr(devinfo, raw); } - inst->src[0].vstride = STRIDE(brw_inst_src0_vstride(devinfo, raw)); + inst->src[0].vstride = STRIDE(brw_eu_inst_src0_vstride(devinfo, raw)); if (inst->access_mode == BRW_ALIGN_1) { - inst->src[0].width = WIDTH(brw_inst_src0_width(devinfo, raw)); - inst->src[0].hstride = STRIDE(brw_inst_src0_hstride(devinfo, raw)); + inst->src[0].width = WIDTH(brw_eu_inst_src0_width(devinfo, raw)); + inst->src[0].hstride = STRIDE(brw_eu_inst_src0_hstride(devinfo, raw)); } } if (inst->num_sources > 1) { - inst->src[1].file = brw_inst_src1_reg_file(devinfo, raw); - inst->src[1].type = brw_inst_src1_type(devinfo, raw); - inst->src[1].negate = brw_inst_src1_negate(devinfo, raw); - inst->src[1].abs = brw_inst_src1_abs(devinfo, raw); + inst->src[1].file = brw_eu_inst_src1_reg_file(devinfo, raw); + inst->src[1].type = brw_eu_inst_src1_type(devinfo, raw); + inst->src[1].negate = brw_eu_inst_src1_negate(devinfo, raw); + inst->src[1].abs = brw_eu_inst_src1_abs(devinfo, raw); if (inst->src[1].file != IMM) { if (inst->src[1].address_mode == BRW_ADDRESS_DIRECT) { - inst->src[1].nr = brw_inst_src1_da_reg_nr(devinfo, raw); + inst->src[1].nr = brw_eu_inst_src1_da_reg_nr(devinfo, raw); if (inst->access_mode == BRW_ALIGN_1) { - inst->src[1].subnr = brw_inst_src1_da1_subreg_nr(devinfo, raw); + inst->src[1].subnr = brw_eu_inst_src1_da1_subreg_nr(devinfo, raw); } else { - inst->src[1].subnr = brw_inst_src1_da16_subreg_nr(devinfo, raw) * 16; + inst->src[1].subnr = brw_eu_inst_src1_da16_subreg_nr(devinfo, raw) * 16; } } else { - inst->src[1].subnr = brw_inst_src1_ia_subreg_nr(devinfo, raw); + inst->src[1].subnr = brw_eu_inst_src1_ia_subreg_nr(devinfo, raw); } - inst->src[1].vstride = STRIDE(brw_inst_src1_vstride(devinfo, raw)); + inst->src[1].vstride = STRIDE(brw_eu_inst_src1_vstride(devinfo, raw)); if (inst->access_mode == BRW_ALIGN_1) { - inst->src[1].width = WIDTH(brw_inst_src1_width(devinfo, raw)); - inst->src[1].hstride = STRIDE(brw_inst_src1_hstride(devinfo, raw)); + inst->src[1].width = WIDTH(brw_eu_inst_src1_width(devinfo, raw)); + inst->src[1].hstride = STRIDE(brw_eu_inst_src1_hstride(devinfo, raw)); } } } @@ -2602,64 +2602,64 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, assert(inst->has_dst); if (inst->access_mode == BRW_ALIGN_1) { - inst->dst.file = brw_inst_3src_a1_dst_reg_file(devinfo, raw); - inst->dst.type = brw_inst_3src_a1_dst_type(devinfo, raw); - inst->dst.nr = brw_inst_3src_dst_reg_nr(devinfo, raw); - inst->dst.subnr = brw_inst_3src_a1_dst_subreg_nr(devinfo, raw) * 8; - inst->dst.hstride = STRIDE(brw_inst_3src_a1_dst_hstride(devinfo, raw)); + inst->dst.file = brw_eu_inst_3src_a1_dst_reg_file(devinfo, raw); + inst->dst.type = brw_eu_inst_3src_a1_dst_type(devinfo, raw); + inst->dst.nr = brw_eu_inst_3src_dst_reg_nr(devinfo, raw); + inst->dst.subnr = brw_eu_inst_3src_a1_dst_subreg_nr(devinfo, raw) * 8; + inst->dst.hstride = STRIDE(brw_eu_inst_3src_a1_dst_hstride(devinfo, raw)); - inst->src[0].file = brw_inst_3src_a1_src0_reg_file(devinfo, raw); - inst->src[0].type = brw_inst_3src_a1_src0_type(devinfo, raw); - inst->src[0].negate = brw_inst_3src_src0_negate(devinfo, raw); - inst->src[0].abs = brw_inst_3src_src0_abs(devinfo, raw); + inst->src[0].file = brw_eu_inst_3src_a1_src0_reg_file(devinfo, raw); + inst->src[0].type = brw_eu_inst_3src_a1_src0_type(devinfo, raw); + inst->src[0].negate = brw_eu_inst_3src_src0_negate(devinfo, raw); + inst->src[0].abs = brw_eu_inst_3src_src0_abs(devinfo, raw); if (inst->src[0].file != IMM) { - inst->src[0].nr = brw_inst_3src_src0_reg_nr(devinfo, raw); - inst->src[0].subnr = brw_inst_3src_a1_src0_subreg_nr(devinfo, raw); - inst->src[0].vstride = VSTRIDE_3SRC(brw_inst_3src_a1_src0_vstride(devinfo, raw)); - inst->src[0].hstride = STRIDE(brw_inst_3src_a1_src0_hstride(devinfo, raw)); + inst->src[0].nr = brw_eu_inst_3src_src0_reg_nr(devinfo, raw); + inst->src[0].subnr = brw_eu_inst_3src_a1_src0_subreg_nr(devinfo, raw); + inst->src[0].vstride = VSTRIDE_3SRC(brw_eu_inst_3src_a1_src0_vstride(devinfo, raw)); + inst->src[0].hstride = STRIDE(brw_eu_inst_3src_a1_src0_hstride(devinfo, raw)); } - inst->src[1].file = brw_inst_3src_a1_src1_reg_file(devinfo, raw); - inst->src[1].type = brw_inst_3src_a1_src1_type(devinfo, raw); - inst->src[1].negate = brw_inst_3src_src1_negate(devinfo, raw); - inst->src[1].abs = brw_inst_3src_src1_abs(devinfo, raw); - inst->src[1].nr = brw_inst_3src_src1_reg_nr(devinfo, raw); - inst->src[1].subnr = brw_inst_3src_a1_src1_subreg_nr(devinfo, raw); - inst->src[1].vstride = VSTRIDE_3SRC(brw_inst_3src_a1_src1_vstride(devinfo, raw)); - inst->src[1].hstride = STRIDE(brw_inst_3src_a1_src1_hstride(devinfo, raw)); + inst->src[1].file = brw_eu_inst_3src_a1_src1_reg_file(devinfo, raw); + inst->src[1].type = brw_eu_inst_3src_a1_src1_type(devinfo, raw); + inst->src[1].negate = brw_eu_inst_3src_src1_negate(devinfo, raw); + inst->src[1].abs = brw_eu_inst_3src_src1_abs(devinfo, raw); + inst->src[1].nr = brw_eu_inst_3src_src1_reg_nr(devinfo, raw); + inst->src[1].subnr = brw_eu_inst_3src_a1_src1_subreg_nr(devinfo, raw); + inst->src[1].vstride = VSTRIDE_3SRC(brw_eu_inst_3src_a1_src1_vstride(devinfo, raw)); + inst->src[1].hstride = STRIDE(brw_eu_inst_3src_a1_src1_hstride(devinfo, raw)); - inst->src[2].file = brw_inst_3src_a1_src2_reg_file(devinfo, raw); - inst->src[2].type = brw_inst_3src_a1_src2_type(devinfo, raw); - inst->src[2].negate = brw_inst_3src_src2_negate(devinfo, raw); - inst->src[2].abs = brw_inst_3src_src2_abs(devinfo, raw); + inst->src[2].file = brw_eu_inst_3src_a1_src2_reg_file(devinfo, raw); + inst->src[2].type = brw_eu_inst_3src_a1_src2_type(devinfo, raw); + inst->src[2].negate = brw_eu_inst_3src_src2_negate(devinfo, raw); + inst->src[2].abs = brw_eu_inst_3src_src2_abs(devinfo, raw); if (inst->src[2].file != IMM) { - inst->src[2].nr = brw_inst_3src_src2_reg_nr(devinfo, raw); - inst->src[2].subnr = brw_inst_3src_a1_src2_subreg_nr(devinfo, raw); - inst->src[2].hstride = STRIDE(brw_inst_3src_a1_src2_hstride(devinfo, raw)); + inst->src[2].nr = brw_eu_inst_3src_src2_reg_nr(devinfo, raw); + inst->src[2].subnr = brw_eu_inst_3src_a1_src2_subreg_nr(devinfo, raw); + inst->src[2].hstride = STRIDE(brw_eu_inst_3src_a1_src2_hstride(devinfo, raw)); } } else { inst->dst.file = FIXED_GRF; - inst->dst.type = brw_inst_3src_a16_dst_type(devinfo, raw); - inst->dst.nr = brw_inst_3src_dst_reg_nr(devinfo, raw); - inst->dst.subnr = brw_inst_3src_a16_dst_subreg_nr(devinfo, raw) * 4; + inst->dst.type = brw_eu_inst_3src_a16_dst_type(devinfo, raw); + inst->dst.nr = brw_eu_inst_3src_dst_reg_nr(devinfo, raw); + inst->dst.subnr = brw_eu_inst_3src_a16_dst_subreg_nr(devinfo, raw) * 4; - enum brw_reg_type src_type = brw_inst_3src_a16_src_type(devinfo, raw); + enum brw_reg_type src_type = brw_eu_inst_3src_a16_src_type(devinfo, raw); inst->src[0].file = FIXED_GRF; inst->src[0].type = src_type; - inst->src[0].nr = brw_inst_3src_src0_reg_nr(devinfo, raw); - inst->src[0].subnr = brw_inst_3src_a16_src0_subreg_nr(devinfo, raw) * 4; + inst->src[0].nr = brw_eu_inst_3src_src0_reg_nr(devinfo, raw); + inst->src[0].subnr = brw_eu_inst_3src_a16_src0_subreg_nr(devinfo, raw) * 4; inst->src[1].file = FIXED_GRF; inst->src[1].type = src_type; - inst->src[1].nr = brw_inst_3src_src1_reg_nr(devinfo, raw); - inst->src[1].subnr = brw_inst_3src_a16_src1_subreg_nr(devinfo, raw) * 4; + inst->src[1].nr = brw_eu_inst_3src_src1_reg_nr(devinfo, raw); + inst->src[1].subnr = brw_eu_inst_3src_a16_src1_subreg_nr(devinfo, raw) * 4; inst->src[2].file = FIXED_GRF; inst->src[2].type = src_type; - inst->src[2].nr = brw_inst_3src_src2_reg_nr(devinfo, raw); - inst->src[2].subnr = brw_inst_3src_a16_src2_subreg_nr(devinfo, raw) * 4; + inst->src[2].nr = brw_eu_inst_3src_src2_reg_nr(devinfo, raw); + inst->src[2].subnr = brw_eu_inst_3src_a16_src2_subreg_nr(devinfo, raw) * 4; } break; } @@ -2668,25 +2668,25 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, assert(inst->num_sources == 3); assert(inst->has_dst); - inst->dst.file = brw_inst_dpas_3src_dst_reg_file(devinfo, raw); - inst->dst.type = brw_inst_dpas_3src_dst_type(devinfo, raw); - inst->dst.nr = brw_inst_dpas_3src_dst_reg_nr(devinfo, raw); - inst->dst.subnr = brw_inst_dpas_3src_dst_subreg_nr(devinfo, raw); + inst->dst.file = brw_eu_inst_dpas_3src_dst_reg_file(devinfo, raw); + inst->dst.type = brw_eu_inst_dpas_3src_dst_type(devinfo, raw); + inst->dst.nr = brw_eu_inst_dpas_3src_dst_reg_nr(devinfo, raw); + inst->dst.subnr = brw_eu_inst_dpas_3src_dst_subreg_nr(devinfo, raw); - inst->src[0].file = brw_inst_dpas_3src_src0_reg_file(devinfo, raw); - inst->src[0].type = brw_inst_dpas_3src_src0_type(devinfo, raw); - inst->src[0].nr = brw_inst_dpas_3src_src0_reg_nr(devinfo, raw); - inst->src[0].subnr = brw_inst_dpas_3src_src0_subreg_nr(devinfo, raw); + inst->src[0].file = brw_eu_inst_dpas_3src_src0_reg_file(devinfo, raw); + inst->src[0].type = brw_eu_inst_dpas_3src_src0_type(devinfo, raw); + inst->src[0].nr = brw_eu_inst_dpas_3src_src0_reg_nr(devinfo, raw); + inst->src[0].subnr = brw_eu_inst_dpas_3src_src0_subreg_nr(devinfo, raw); - inst->src[1].file = brw_inst_dpas_3src_src1_reg_file(devinfo, raw); - inst->src[1].type = brw_inst_dpas_3src_src1_type(devinfo, raw); - inst->src[1].nr = brw_inst_dpas_3src_src1_reg_nr(devinfo, raw); - inst->src[1].subnr = brw_inst_dpas_3src_src1_subreg_nr(devinfo, raw); + inst->src[1].file = brw_eu_inst_dpas_3src_src1_reg_file(devinfo, raw); + inst->src[1].type = brw_eu_inst_dpas_3src_src1_type(devinfo, raw); + inst->src[1].nr = brw_eu_inst_dpas_3src_src1_reg_nr(devinfo, raw); + inst->src[1].subnr = brw_eu_inst_dpas_3src_src1_subreg_nr(devinfo, raw); - inst->src[2].file = brw_inst_dpas_3src_src2_reg_file(devinfo, raw); - inst->src[2].type = brw_inst_dpas_3src_src2_type(devinfo, raw); - inst->src[2].nr = brw_inst_dpas_3src_src2_reg_nr(devinfo, raw); - inst->src[2].subnr = brw_inst_dpas_3src_src2_subreg_nr(devinfo, raw); + inst->src[2].file = brw_eu_inst_dpas_3src_src2_reg_file(devinfo, raw); + inst->src[2].type = brw_eu_inst_dpas_3src_src2_type(devinfo, raw); + inst->src[2].nr = brw_eu_inst_dpas_3src_src2_reg_nr(devinfo, raw); + inst->src[2].subnr = brw_eu_inst_dpas_3src_src2_subreg_nr(devinfo, raw); break; } @@ -2694,36 +2694,36 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, if (inst->opcode == BRW_OPCODE_SENDS || inst->opcode == BRW_OPCODE_SENDSC) { assert(devinfo->ver < 12); - inst->dst.file = brw_inst_send_dst_reg_file(devinfo, raw); + inst->dst.file = brw_eu_inst_send_dst_reg_file(devinfo, raw); inst->dst.type = BRW_TYPE_D; - inst->dst.nr = brw_inst_dst_da_reg_nr(devinfo, raw); - inst->dst.subnr = brw_inst_dst_da16_subreg_nr(devinfo, raw) * 16; + inst->dst.nr = brw_eu_inst_dst_da_reg_nr(devinfo, raw); + inst->dst.subnr = brw_eu_inst_dst_da16_subreg_nr(devinfo, raw) * 16; inst->src[0].file = FIXED_GRF; inst->src[0].type = BRW_TYPE_D; - inst->src[0].nr = brw_inst_src0_da_reg_nr(devinfo, raw); - inst->src[0].subnr = brw_inst_src0_da16_subreg_nr(devinfo, raw) * 16; + inst->src[0].nr = brw_eu_inst_src0_da_reg_nr(devinfo, raw); + inst->src[0].subnr = brw_eu_inst_src0_da16_subreg_nr(devinfo, raw) * 16; if (inst->num_sources > 1) { - inst->src[1].file = brw_inst_send_src1_reg_file(devinfo, raw); + inst->src[1].file = brw_eu_inst_send_src1_reg_file(devinfo, raw); inst->src[1].type = BRW_TYPE_D; - inst->src[1].nr = brw_inst_send_src1_reg_nr(devinfo, raw); + inst->src[1].nr = brw_eu_inst_send_src1_reg_nr(devinfo, raw); } } else { assert(devinfo->ver >= 12); - inst->dst.file = brw_inst_dst_reg_file(devinfo, raw); + inst->dst.file = brw_eu_inst_dst_reg_file(devinfo, raw); inst->dst.type = BRW_TYPE_D; - inst->dst.nr = brw_inst_dst_da_reg_nr(devinfo, raw); + inst->dst.nr = brw_eu_inst_dst_da_reg_nr(devinfo, raw); - inst->src[0].file = brw_inst_send_src0_reg_file(devinfo, raw); + inst->src[0].file = brw_eu_inst_send_src0_reg_file(devinfo, raw); inst->src[0].type = BRW_TYPE_D; - inst->src[0].nr = brw_inst_src0_da_reg_nr(devinfo, raw); + inst->src[0].nr = brw_eu_inst_src0_da_reg_nr(devinfo, raw); if (inst->num_sources > 1) { - inst->src[1].file = brw_inst_send_src1_reg_file(devinfo, raw); + inst->src[1].file = brw_eu_inst_send_src1_reg_file(devinfo, raw); inst->src[1].type = BRW_TYPE_D; - inst->src[1].nr = brw_inst_send_src1_reg_nr(devinfo, raw); + inst->src[1].nr = brw_eu_inst_send_src1_reg_nr(devinfo, raw); } } break; @@ -2756,13 +2756,13 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, inst->format == FORMAT_BASIC_THREE_SRC || inst->format == FORMAT_DPAS_THREE_SRC) && !inst_is_send(inst)) { - inst->saturate = brw_inst_saturate(devinfo, raw); + inst->saturate = brw_eu_inst_saturate(devinfo, raw); if (inst->num_sources > 1 || devinfo->ver < 12 || inst->src[0].file != IMM || brw_type_size_bytes(inst->src[0].type) < 8) { - inst->cond_modifier = brw_inst_cond_modifier(devinfo, raw); + inst->cond_modifier = brw_eu_inst_cond_modifier(devinfo, raw); } } @@ -2831,7 +2831,7 @@ brw_validate_instructions(const struct brw_isa_info *isa, for (int src_offset = start_offset; src_offset < end_offset;) { const brw_eu_inst *inst = assembly + src_offset; - bool is_compact = brw_inst_cmpt_control(devinfo, inst); + bool is_compact = brw_eu_inst_cmpt_control(devinfo, inst); unsigned inst_size = is_compact ? sizeof(brw_eu_compact_inst) : sizeof(brw_eu_inst); brw_eu_inst uncompacted; diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 4ea1e2b5ddf..48ddd659000 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -140,17 +140,17 @@ fs_generator::patch_halt_jumps() * tests. */ brw_eu_inst *last_halt = brw_HALT(p); - brw_inst_set_uip(p->devinfo, last_halt, 1 * scale); - brw_inst_set_jip(p->devinfo, last_halt, 1 * scale); + brw_eu_inst_set_uip(p->devinfo, last_halt, 1 * scale); + brw_eu_inst_set_jip(p->devinfo, last_halt, 1 * scale); int ip = p->nr_insn; foreach_in_list(ip_record, patch_ip, &discard_halt_patches) { brw_eu_inst *patch = &p->store[patch_ip->ip]; - assert(brw_inst_opcode(p->isa, patch) == BRW_OPCODE_HALT); + assert(brw_eu_inst_opcode(p->isa, patch) == BRW_OPCODE_HALT); /* HALT takes a half-instruction distance from the pre-incremented IP. */ - brw_inst_set_uip(p->devinfo, patch, (ip - patch_ip->ip) * scale); + brw_eu_inst_set_uip(p->devinfo, patch, (ip - patch_ip->ip) * scale); } this->discard_halt_patches.make_empty(); @@ -184,13 +184,13 @@ fs_generator::generate_send(fs_inst *inst, inst->send_ex_desc_scratch, inst->send_ex_bso, inst->eot); if (inst->check_tdr) - brw_inst_set_opcode(p->isa, brw_last_inst, + brw_eu_inst_set_opcode(p->isa, brw_last_inst, devinfo->ver >= 12 ? BRW_OPCODE_SENDC : BRW_OPCODE_SENDSC); } else { brw_send_indirect_message(p, inst->sfid, dst, payload, desc, desc_imm, inst->eot); if (inst->check_tdr) - brw_inst_set_opcode(p->isa, brw_last_inst, BRW_OPCODE_SENDC); + brw_eu_inst_set_opcode(p->isa, brw_last_inst, BRW_OPCODE_SENDC); } } @@ -284,18 +284,18 @@ fs_generator::generate_mov_indirect(fs_inst *inst, * instruction. */ insn = brw_MOV(p, addr, brw_imm_uw(imm_byte_offset)); - brw_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); - brw_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NONE); + brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); + brw_eu_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NONE); if (devinfo->ver >= 12) brw_set_default_swsb(p, tgl_swsb_null()); else - brw_inst_set_no_dd_clear(devinfo, insn, use_dep_ctrl); + brw_eu_inst_set_no_dd_clear(devinfo, insn, use_dep_ctrl); insn = brw_ADD(p, addr, indirect_byte_offset, brw_imm_uw(imm_byte_offset)); if (devinfo->ver >= 12) brw_set_default_swsb(p, tgl_swsb_regdist(1)); else - brw_inst_set_no_dd_check(devinfo, insn, use_dep_ctrl); + brw_eu_inst_set_no_dd_check(devinfo, insn, use_dep_ctrl); if (brw_type_size_bytes(reg.type) > 4 && (intel_device_info_is_9lp(devinfo) || !devinfo->has_64bit_int)) { @@ -428,12 +428,12 @@ fs_generator::generate_shuffle(fs_inst *inst, * pipelined NoMask MOV instruction. */ insn = brw_MOV(p, addr, brw_imm_uw(src_start_offset)); - brw_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); - brw_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NONE); + brw_eu_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); + brw_eu_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NONE); if (devinfo->ver >= 12) brw_set_default_swsb(p, tgl_swsb_null()); else - brw_inst_set_no_dd_clear(devinfo, insn, use_dep_ctrl); + brw_eu_inst_set_no_dd_clear(devinfo, insn, use_dep_ctrl); /* Take into account the component size and horizontal stride. */ assert(src.vstride == src.hstride + src.width); @@ -443,7 +443,7 @@ fs_generator::generate_shuffle(fs_inst *inst, if (devinfo->ver >= 12) brw_set_default_swsb(p, tgl_swsb_regdist(1)); else - brw_inst_set_no_dd_check(devinfo, insn, use_dep_ctrl); + brw_eu_inst_set_no_dd_check(devinfo, insn, use_dep_ctrl); /* Add on the register start offset */ brw_ADD(p, addr, addr, brw_imm_uw(src_start_offset)); @@ -513,8 +513,8 @@ fs_generator::generate_quad_swizzle(const fs_inst *inst, stride(suboffset(src, BRW_GET_SWZ(swiz, c)), 4, 1, 0)); if (devinfo->ver < 12) { - brw_inst_set_no_dd_clear(devinfo, insn, c < 3); - brw_inst_set_no_dd_check(devinfo, insn, c > 0); + brw_eu_inst_set_no_dd_clear(devinfo, insn, c < 3); + brw_eu_inst_set_no_dd_check(devinfo, insn, c > 0); } brw_set_default_swsb(p, tgl_swsb_null()); @@ -716,22 +716,22 @@ fs_generator::generate_scratch_header(fs_inst *inst, if (devinfo->ver >= 12) brw_set_default_swsb(p, tgl_swsb_null()); else - brw_inst_set_no_dd_clear(p->devinfo, insn, true); + brw_eu_inst_set_no_dd_clear(p->devinfo, insn, true); /* Copy the per-thread scratch space size from g0.3[3:0] */ brw_set_default_exec_size(p, BRW_EXECUTE_1); insn = brw_AND(p, suboffset(dst, 3), component(src, 3), brw_imm_ud(INTEL_MASK(3, 0))); if (devinfo->ver < 12) { - brw_inst_set_no_dd_clear(p->devinfo, insn, true); - brw_inst_set_no_dd_check(p->devinfo, insn, true); + brw_eu_inst_set_no_dd_clear(p->devinfo, insn, true); + brw_eu_inst_set_no_dd_check(p->devinfo, insn, true); } /* Copy the scratch base address from g0.5[31:10] */ insn = brw_AND(p, suboffset(dst, 5), component(src, 5), brw_imm_ud(INTEL_MASK(31, 10))); if (devinfo->ver < 12) - brw_inst_set_no_dd_check(p->devinfo, insn, true); + brw_eu_inst_set_no_dd_check(p->devinfo, insn, true); } void @@ -794,8 +794,8 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, */ if (devinfo->ver <= 9 && p->nr_insn > 1 && - brw_inst_opcode(p->isa, brw_last_inst) == BRW_OPCODE_MATH && - brw_inst_math_function(devinfo, brw_last_inst) == BRW_MATH_FUNCTION_POW && + brw_eu_inst_opcode(p->isa, brw_last_inst) == BRW_OPCODE_MATH && + brw_eu_inst_math_function(devinfo, brw_last_inst) == BRW_MATH_FUNCTION_POW && inst->dst.component_size(inst->exec_size) > REG_SIZE) { brw_NOP(p); last_insn_offset = p->next_insn_offset; @@ -1375,10 +1375,10 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, brw_eu_inst *last = &p->store[last_insn_offset / 16]; if (inst->conditional_mod) - brw_inst_set_cond_modifier(p->devinfo, last, inst->conditional_mod); + brw_eu_inst_set_cond_modifier(p->devinfo, last, inst->conditional_mod); if (devinfo->ver < 12) { - brw_inst_set_no_dd_clear(p->devinfo, last, inst->no_dd_clear); - brw_inst_set_no_dd_check(p->devinfo, last, inst->no_dd_check); + brw_eu_inst_set_no_dd_clear(p->devinfo, last, inst->no_dd_clear); + brw_eu_inst_set_no_dd_check(p->devinfo, last, inst->no_dd_check); } } diff --git a/src/intel/compiler/brw_gram.y b/src/intel/compiler/brw_gram.y index 5f49a34e077..fa4c44f8a96 100644 --- a/src/intel/compiler/brw_gram.y +++ b/src/intel/compiler/brw_gram.y @@ -279,38 +279,38 @@ static void i965_asm_set_instruction_options(struct brw_codegen *p, struct options options) { - brw_inst_set_access_mode(p->devinfo, brw_last_inst, + brw_eu_inst_set_access_mode(p->devinfo, brw_last_inst, options.access_mode); - brw_inst_set_mask_control(p->devinfo, brw_last_inst, + brw_eu_inst_set_mask_control(p->devinfo, brw_last_inst, options.mask_control); if (p->devinfo->ver < 12) { - brw_inst_set_thread_control(p->devinfo, brw_last_inst, + brw_eu_inst_set_thread_control(p->devinfo, brw_last_inst, options.thread_control); - brw_inst_set_no_dd_check(p->devinfo, brw_last_inst, + brw_eu_inst_set_no_dd_check(p->devinfo, brw_last_inst, options.no_dd_check); - brw_inst_set_no_dd_clear(p->devinfo, brw_last_inst, + brw_eu_inst_set_no_dd_clear(p->devinfo, brw_last_inst, options.no_dd_clear); } else { - enum opcode opcode = brw_inst_opcode(p->isa, brw_last_inst); - brw_inst_set_swsb(p->devinfo, brw_last_inst, + enum opcode opcode = brw_eu_inst_opcode(p->isa, brw_last_inst); + brw_eu_inst_set_swsb(p->devinfo, brw_last_inst, tgl_swsb_encode(p->devinfo, options.depinfo, opcode)); } - brw_inst_set_debug_control(p->devinfo, brw_last_inst, + brw_eu_inst_set_debug_control(p->devinfo, brw_last_inst, options.debug_control); - if (brw_has_branch_ctrl(p->devinfo, brw_inst_opcode(p->isa, brw_last_inst))) { + if (brw_has_branch_ctrl(p->devinfo, brw_eu_inst_opcode(p->isa, brw_last_inst))) { if (options.acc_wr_control) error(NULL, "Instruction does not support AccWrEnable\n"); - brw_inst_set_branch_control(p->devinfo, brw_last_inst, + brw_eu_inst_set_branch_control(p->devinfo, brw_last_inst, options.branch_control); } else if (options.branch_control) { error(NULL, "Instruction does not support BranchCtrl\n"); } else if (p->devinfo->ver < 20) { - brw_inst_set_acc_wr_control(p->devinfo, brw_last_inst, + brw_eu_inst_set_acc_wr_control(p->devinfo, brw_last_inst, options.acc_wr_control); } - brw_inst_set_cmpt_control(p->devinfo, brw_last_inst, + brw_eu_inst_set_cmpt_control(p->devinfo, brw_last_inst, options.compaction); } @@ -661,7 +661,7 @@ illegalinstruction: ILLEGAL execsize instoptions { brw_next_insn(p, $1); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $2); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $2); i965_asm_set_instruction_options(p, $3); } ; @@ -674,25 +674,25 @@ unaryinstruction: i965_asm_unary_instruction($2, p, $6, $7); brw_pop_insn_state(p); i965_asm_set_instruction_options(p, $8); - brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, + brw_eu_inst_set_cond_modifier(p->devinfo, brw_last_inst, $4.cond_modifier); - if (!brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) { - brw_inst_set_flag_reg_nr(p->devinfo, + if (!brw_eu_inst_flag_reg_nr(p->devinfo, brw_last_inst)) { + brw_eu_inst_set_flag_reg_nr(p->devinfo, brw_last_inst, $4.flag_reg_nr); - brw_inst_set_flag_subreg_nr(p->devinfo, + brw_eu_inst_set_flag_subreg_nr(p->devinfo, brw_last_inst, $4.flag_subreg_nr); } if ($7.file != IMM) { - brw_inst_set_src0_vstride(p->devinfo, brw_last_inst, + brw_eu_inst_set_src0_vstride(p->devinfo, brw_last_inst, $7.vstride); } - brw_inst_set_saturate(p->devinfo, brw_last_inst, $3); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5); - brw_inst_set_group(p->devinfo, brw_last_inst, $8.chan_offset); + brw_eu_inst_set_saturate(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $5); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $8.chan_offset); } ; @@ -719,19 +719,19 @@ binaryinstruction: brw_set_default_access_mode(p, $9.access_mode); i965_asm_binary_instruction($2, p, $6, $7, $8); i965_asm_set_instruction_options(p, $9); - brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, + brw_eu_inst_set_cond_modifier(p->devinfo, brw_last_inst, $4.cond_modifier); - if (!brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) { - brw_inst_set_flag_reg_nr(p->devinfo, brw_last_inst, + if (!brw_eu_inst_flag_reg_nr(p->devinfo, brw_last_inst)) { + brw_eu_inst_set_flag_reg_nr(p->devinfo, brw_last_inst, $4.flag_reg_nr); - brw_inst_set_flag_subreg_nr(p->devinfo, brw_last_inst, + brw_eu_inst_set_flag_subreg_nr(p->devinfo, brw_last_inst, $4.flag_subreg_nr); } - brw_inst_set_saturate(p->devinfo, brw_last_inst, $3); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5); - brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); + brw_eu_inst_set_saturate(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $5); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); brw_pop_insn_state(p); } @@ -762,21 +762,21 @@ binaryaccinstruction: i965_asm_binary_instruction($2, p, $6, $7, $8); brw_pop_insn_state(p); i965_asm_set_instruction_options(p, $9); - brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, + brw_eu_inst_set_cond_modifier(p->devinfo, brw_last_inst, $4.cond_modifier); - if (!brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) { - brw_inst_set_flag_reg_nr(p->devinfo, + if (!brw_eu_inst_flag_reg_nr(p->devinfo, brw_last_inst)) { + brw_eu_inst_set_flag_reg_nr(p->devinfo, brw_last_inst, $4.flag_reg_nr); - brw_inst_set_flag_subreg_nr(p->devinfo, + brw_eu_inst_set_flag_subreg_nr(p->devinfo, brw_last_inst, $4.flag_subreg_nr); } - brw_inst_set_saturate(p->devinfo, brw_last_inst, $3); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5); - brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); + brw_eu_inst_set_saturate(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $5); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); } ; @@ -801,9 +801,9 @@ mathinstruction: brw_set_default_access_mode(p, $9.access_mode); gfx6_math(p, $6, $4, $7, $8); i965_asm_set_instruction_options(p, $9); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5); - brw_inst_set_saturate(p->devinfo, brw_last_inst, $3); - brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $5); + brw_eu_inst_set_saturate(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); brw_pop_insn_state(p); } ; @@ -842,19 +842,19 @@ ternaryinstruction: i965_asm_ternary_instruction($2, p, $6, $7, $8, $9); brw_pop_insn_state(p); i965_asm_set_instruction_options(p, $10); - brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, + brw_eu_inst_set_cond_modifier(p->devinfo, brw_last_inst, $4.cond_modifier); if (p->devinfo->ver < 12) { - brw_inst_set_3src_a16_flag_reg_nr(p->devinfo, brw_last_inst, + brw_eu_inst_set_3src_a16_flag_reg_nr(p->devinfo, brw_last_inst, $4.flag_reg_nr); - brw_inst_set_3src_a16_flag_subreg_nr(p->devinfo, brw_last_inst, + brw_eu_inst_set_3src_a16_flag_subreg_nr(p->devinfo, brw_last_inst, $4.flag_subreg_nr); } - brw_inst_set_saturate(p->devinfo, brw_last_inst, $3); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $5); - brw_inst_set_group(p->devinfo, brw_last_inst, $10.chan_offset); + brw_eu_inst_set_saturate(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $5); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $10.chan_offset); } ; @@ -874,7 +874,7 @@ waitinstruction: { brw_next_insn(p, $1); i965_asm_set_instruction_options(p, $4); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $2); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $2); brw_set_default_access_mode(p, $4.access_mode); struct brw_reg dest = $3; dest.swizzle = brw_swizzle_for_mask(dest.writemask); @@ -883,7 +883,7 @@ waitinstruction: brw_set_dest(p, brw_last_inst, dest); brw_set_src0(p, brw_last_inst, dest); brw_set_src1(p, brw_last_inst, brw_null_reg()); - brw_inst_set_mask_control(p->devinfo, brw_last_inst, BRW_MASK_DISABLE); + brw_eu_inst_set_mask_control(p->devinfo, brw_last_inst, BRW_MASK_DISABLE); } ; @@ -892,16 +892,16 @@ sendinstruction: predicate sendopcode execsize dst payload exp2 sharedfunction msgdesc instoptions { i965_asm_set_instruction_options(p, $9); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, $4); brw_set_src0(p, brw_last_inst, $5); brw_eu_inst_set_bits(brw_last_inst, 127, 96, $6); - brw_inst_set_src1_file_type(p->devinfo, brw_last_inst, + brw_eu_inst_set_src1_file_type(p->devinfo, brw_last_inst, IMM, BRW_TYPE_UD); - brw_inst_set_sfid(p->devinfo, brw_last_inst, $7); - brw_inst_set_eot(p->devinfo, brw_last_inst, $9.end_of_thread); - brw_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); + brw_eu_inst_set_sfid(p->devinfo, brw_last_inst, $7); + brw_eu_inst_set_eot(p->devinfo, brw_last_inst, $9.end_of_thread); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $9.chan_offset); brw_pop_insn_state(p); } @@ -910,46 +910,46 @@ sendinstruction: assert(p->devinfo->ver < 12); i965_asm_set_instruction_options(p, $10); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, $4); brw_set_src0(p, brw_last_inst, $5); brw_eu_inst_set_bits(brw_last_inst, 127, 96, $7); - brw_inst_set_sfid(p->devinfo, brw_last_inst, $8); - brw_inst_set_eot(p->devinfo, brw_last_inst, $10.end_of_thread); - brw_inst_set_group(p->devinfo, brw_last_inst, $10.chan_offset); + brw_eu_inst_set_sfid(p->devinfo, brw_last_inst, $8); + brw_eu_inst_set_eot(p->devinfo, brw_last_inst, $10.end_of_thread); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $10.chan_offset); brw_pop_insn_state(p); } | predicate sendsopcode execsize dst payload payload desc ex_desc sharedfunction msgdesc instoptions { i965_asm_set_instruction_options(p, $11); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, $4); brw_set_src0(p, brw_last_inst, $5); brw_set_src1(p, brw_last_inst, $6); if ($7.file == IMM) { - brw_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 0); - brw_inst_set_send_desc(p->devinfo, brw_last_inst, $7.ud); + brw_eu_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 0); + brw_eu_inst_set_send_desc(p->devinfo, brw_last_inst, $7.ud); } else { - brw_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 1); + brw_eu_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 1); } if ($8.file == IMM) { - brw_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 0); - brw_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $8.ud, false); + brw_eu_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 0); + brw_eu_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $8.ud, false); } else { - brw_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 1); - brw_inst_set_send_ex_desc_ia_subreg_nr(p->devinfo, brw_last_inst, $8.subnr >> 2); + brw_eu_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 1); + brw_eu_inst_set_send_ex_desc_ia_subreg_nr(p->devinfo, brw_last_inst, $8.subnr >> 2); } - brw_inst_set_sfid(p->devinfo, brw_last_inst, $9); - brw_inst_set_eot(p->devinfo, brw_last_inst, $11.end_of_thread); - brw_inst_set_group(p->devinfo, brw_last_inst, $11.chan_offset); + brw_eu_inst_set_sfid(p->devinfo, brw_last_inst, $9); + brw_eu_inst_set_eot(p->devinfo, brw_last_inst, $11.end_of_thread); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $11.chan_offset); if (p->devinfo->verx10 >= 125 && $10.ex_bso) { - brw_inst_set_send_ex_bso(p->devinfo, brw_last_inst, 1); - brw_inst_set_send_src1_len(p->devinfo, brw_last_inst, + brw_eu_inst_set_send_ex_bso(p->devinfo, brw_last_inst, 1); + brw_eu_inst_set_send_src1_len(p->devinfo, brw_last_inst, $10.src1_len); } @@ -960,32 +960,32 @@ sendinstruction: assert(p->devinfo->ver >= 30); i965_asm_set_instruction_options(p, $13); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, $4); brw_set_src0(p, brw_last_inst, $7); brw_set_src1(p, brw_last_inst, brw_null_reg()); if ($9.file == IMM) { - brw_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 0); - brw_inst_set_send_desc(p->devinfo, brw_last_inst, $9.ud); + brw_eu_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 0); + brw_eu_inst_set_send_desc(p->devinfo, brw_last_inst, $9.ud); } else { - brw_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 1); + brw_eu_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 1); } if ($10.file == IMM) { - brw_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 0); - brw_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $10.ud, true); + brw_eu_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 0); + brw_eu_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $10.ud, true); } else { - brw_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 1); - brw_inst_set_send_ex_desc_ia_subreg_nr(p->devinfo, brw_last_inst, $10.subnr >> 2); + brw_eu_inst_set_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst, 1); + brw_eu_inst_set_send_ex_desc_ia_subreg_nr(p->devinfo, brw_last_inst, $10.subnr >> 2); } - brw_inst_set_sfid(p->devinfo, brw_last_inst, $11); - brw_inst_set_eot(p->devinfo, brw_last_inst, $13.end_of_thread); - brw_inst_set_group(p->devinfo, brw_last_inst, $13.chan_offset); + brw_eu_inst_set_sfid(p->devinfo, brw_last_inst, $11); + brw_eu_inst_set_eot(p->devinfo, brw_last_inst, $13.end_of_thread); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $13.chan_offset); if ($12.ex_bso) { - brw_inst_set_send_ex_bso(p->devinfo, brw_last_inst, 1); + brw_eu_inst_set_send_ex_bso(p->devinfo, brw_last_inst, 1); /* Not settings src1 length, as its implied zero. */ } @@ -1069,12 +1069,12 @@ jumpinstruction: { brw_next_insn(p, $2); i965_asm_set_instruction_options(p, $5); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, brw_ip_reg()); brw_set_src0(p, brw_last_inst, brw_ip_reg()); brw_set_src1(p, brw_last_inst, $4); - brw_inst_set_pred_control(p->devinfo, brw_last_inst, - brw_inst_pred_control(p->devinfo, + brw_eu_inst_set_pred_control(p->devinfo, brw_last_inst, + brw_eu_inst_pred_control(p->devinfo, brw_last_inst)); brw_pop_insn_state(p); } @@ -1088,7 +1088,7 @@ branchinstruction: brw_next_insn(p, $2); i965_asm_set_instruction_options(p, $5); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_src0(p, brw_last_inst, brw_imm_d(0x0)); @@ -1101,7 +1101,7 @@ branchinstruction: brw_next_insn(p, $1); i965_asm_set_instruction_options(p, $5); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $2); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $2); brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D)); @@ -1115,7 +1115,7 @@ branchinstruction: brw_next_insn(p, $2); i965_asm_set_instruction_options(p, $6); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, vec1(retype(brw_null_reg(), @@ -1136,7 +1136,7 @@ breakinstruction: brw_next_insn(p, $2); i965_asm_set_instruction_options(p, $6); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D)); @@ -1151,7 +1151,7 @@ breakinstruction: brw_next_insn(p, $2); i965_asm_set_instruction_options(p, $6); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D)); @@ -1169,7 +1169,7 @@ breakinstruction: brw_next_insn(p, $2); i965_asm_set_instruction_options(p, $6); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, brw_ip_reg()); brw_set_src0(p, brw_last_inst, brw_imm_d(0x0)); @@ -1186,7 +1186,7 @@ loopinstruction: brw_next_insn(p, $2); i965_asm_set_instruction_options(p, $5); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3); brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), @@ -1219,10 +1219,10 @@ syncinstruction: brw_set_default_access_mode(p, $6.access_mode); brw_SYNC(p, $3); i965_asm_set_instruction_options(p, $6); - brw_inst_set_exec_size(p->devinfo, brw_last_inst, $4); + brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $4); brw_set_src0(p, brw_last_inst, $5); - brw_inst_set_eot(p->devinfo, brw_last_inst, $6.end_of_thread); - brw_inst_set_group(p->devinfo, brw_last_inst, $6.chan_offset); + brw_eu_inst_set_eot(p->devinfo, brw_last_inst, $6.end_of_thread); + brw_eu_inst_set_group(p->devinfo, brw_last_inst, $6.chan_offset); brw_pop_insn_state(p); } diff --git a/src/intel/compiler/test_eu_compact.cpp b/src/intel/compiler/test_eu_compact.cpp index 08d5481d633..d828fc5ae07 100644 --- a/src/intel/compiler/test_eu_compact.cpp +++ b/src/intel/compiler/test_eu_compact.cpp @@ -95,10 +95,10 @@ clear_pad_bits(const struct brw_isa_info *isa, brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; - if (brw_inst_opcode(isa, inst) != BRW_OPCODE_SEND && - brw_inst_opcode(isa, inst) != BRW_OPCODE_SENDC && - brw_inst_src0_reg_file(devinfo, inst) != IMM && - brw_inst_src1_reg_file(devinfo, inst) != IMM) { + if (brw_eu_inst_opcode(isa, inst) != BRW_OPCODE_SEND && + brw_eu_inst_opcode(isa, inst) != BRW_OPCODE_SENDC && + brw_eu_inst_src0_reg_file(devinfo, inst) != IMM && + brw_eu_inst_src1_reg_file(devinfo, inst) != IMM) { brw_eu_inst_set_bits(inst, 127, 111, 0); } } @@ -116,7 +116,7 @@ skip_bit(const struct brw_isa_info *isa, brw_eu_inst *src, int bit) if (bit == 29) return true; - if (is_3src(isa, brw_inst_opcode(isa, src))) { + if (is_3src(isa, brw_eu_inst_opcode(isa, src))) { if (bit == 127) return true; } else { @@ -131,10 +131,10 @@ skip_bit(const struct brw_isa_info *isa, brw_eu_inst *src, int bit) } /* sometimes these are pad bits. */ - if (brw_inst_opcode(isa, src) != BRW_OPCODE_SEND && - brw_inst_opcode(isa, src) != BRW_OPCODE_SENDC && - brw_inst_src0_reg_file(devinfo, src) != IMM && - brw_inst_src1_reg_file(devinfo, src) != IMM && + if (brw_eu_inst_opcode(isa, src) != BRW_OPCODE_SEND && + brw_eu_inst_opcode(isa, src) != BRW_OPCODE_SENDC && + brw_eu_inst_src0_reg_file(devinfo, src) != IMM && + brw_eu_inst_src1_reg_file(devinfo, src) != IMM && bit >= 121) { return true; } @@ -285,6 +285,6 @@ TEST_P(Instructions, f0_1_MOV_GRF_GRF) brw_push_insn_state(p); brw_set_default_predicate_control(p, BRW_PREDICATE_NORMAL); brw_eu_inst *mov = brw_MOV(p, g0, g2); - brw_inst_set_flag_subreg_nr(p->devinfo, mov, 1); + brw_eu_inst_set_flag_subreg_nr(p->devinfo, mov, 1); brw_pop_insn_state(p); } diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index 0bf82b35e39..b59f1282340 100644 --- a/src/intel/compiler/test_eu_validate.cpp +++ b/src/intel/compiler/test_eu_validate.cpp @@ -205,18 +205,18 @@ TEST_P(validation_test, invalid_exec_size_encoding) for (unsigned i = 0; i < ARRAY_SIZE(test_case); i++) { brw_MOV(p, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, test_case[i].exec_size); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_exec_size(&devinfo, last_inst, test_case[i].exec_size); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); if (test_case[i].exec_size == BRW_EXECUTE_1) { - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); } else { - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_2); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_2); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); } EXPECT_EQ(test_case[i].expected_result, validate(p)); @@ -280,9 +280,9 @@ TEST_P(validation_test, invalid_type_encoding) if (file == FIXED_GRF) { struct brw_reg g = retype(g0, test_case[i].type); brw_MOV(p, g, g); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); } else { enum brw_reg_type t; @@ -319,14 +319,14 @@ TEST_P(validation_test, invalid_type_encoding) BITSET_FOREACH_SET(e, invalid_encodings, num_encodings) { if (file == FIXED_GRF) { brw_MOV(p, g0, g0); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); } else { brw_MOV(p, g0, brw_imm_w(0)); } - brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, e); - brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, e); + brw_eu_inst_set_dst_reg_hw_type(&devinfo, last_inst, e); + brw_eu_inst_set_src0_reg_hw_type(&devinfo, last_inst, e); EXPECT_FALSE(validate(p)); @@ -403,8 +403,8 @@ TEST_P(validation_test, invalid_type_encoding_3src_a16) brw_BFE(p, g0, g0, g0, g0); } - brw_inst_set_3src_a16_dst_hw_type(&devinfo, last_inst, e); - brw_inst_set_3src_a16_src_hw_type(&devinfo, last_inst, e); + brw_eu_inst_set_3src_a16_dst_hw_type(&devinfo, last_inst, e); + brw_eu_inst_set_3src_a16_src_hw_type(&devinfo, last_inst, e); EXPECT_FALSE(validate(p)); @@ -493,18 +493,18 @@ TEST_P(validation_test, invalid_type_encoding_3src_a1) for (unsigned i = 0; i < 2; i++) { if (i == 0) { brw_MAD(p, g0, g0, g0, g0); - brw_inst_set_3src_a1_exec_type(&devinfo, last_inst, BRW_ALIGN1_3SRC_EXEC_TYPE_FLOAT); + brw_eu_inst_set_3src_a1_exec_type(&devinfo, last_inst, BRW_ALIGN1_3SRC_EXEC_TYPE_FLOAT); } else { brw_CSEL(p, g0, g0, g0, g0); - brw_inst_set_3src_cond_modifier(&devinfo, last_inst, BRW_CONDITIONAL_NZ); - brw_inst_set_3src_a1_exec_type(&devinfo, last_inst, BRW_ALIGN1_3SRC_EXEC_TYPE_INT); + brw_eu_inst_set_3src_cond_modifier(&devinfo, last_inst, BRW_CONDITIONAL_NZ); + brw_eu_inst_set_3src_a1_exec_type(&devinfo, last_inst, BRW_ALIGN1_3SRC_EXEC_TYPE_INT); } - brw_inst_set_3src_a1_exec_type(&devinfo, last_inst, exec_type); - brw_inst_set_3src_a1_dst_hw_type (&devinfo, last_inst, hw_type); - brw_inst_set_3src_a1_src0_hw_type(&devinfo, last_inst, hw_type); - brw_inst_set_3src_a1_src1_hw_type(&devinfo, last_inst, hw_type); - brw_inst_set_3src_a1_src2_hw_type(&devinfo, last_inst, hw_type); + brw_eu_inst_set_3src_a1_exec_type(&devinfo, last_inst, exec_type); + brw_eu_inst_set_3src_a1_dst_hw_type (&devinfo, last_inst, hw_type); + brw_eu_inst_set_3src_a1_src0_hw_type(&devinfo, last_inst, hw_type); + brw_eu_inst_set_3src_a1_src1_hw_type(&devinfo, last_inst, hw_type); + brw_eu_inst_set_3src_a1_src2_hw_type(&devinfo, last_inst, hw_type); EXPECT_FALSE(validate(p)); @@ -532,7 +532,7 @@ TEST_P(validation_test, 3src_inst_access_mode) brw_set_default_access_mode(p, BRW_ALIGN_16); brw_MAD(p, g0, g0, g0, g0); - brw_inst_set_access_mode(&devinfo, last_inst, test_case[i].mode); + brw_eu_inst_set_access_mode(&devinfo, last_inst, test_case[i].mode); EXPECT_EQ(test_case[i].expected_result, validate(p)); @@ -547,19 +547,19 @@ TEST_P(validation_test, 3src_inst_access_mode) TEST_P(validation_test, dest_stride_must_be_equal_to_the_ratio_of_exec_size_to_dest_size) { brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); EXPECT_TRUE(validate(p)); } @@ -571,29 +571,29 @@ TEST_P(validation_test, dest_stride_must_be_equal_to_the_ratio_of_exec_size_to_d TEST_P(validation_test, dst_subreg_must_be_aligned_to_exec_type_size) { brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 2); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 2); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 8); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 8); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); EXPECT_TRUE(validate(p)); } @@ -602,14 +602,14 @@ TEST_P(validation_test, dst_subreg_must_be_aligned_to_exec_type_size) TEST_P(validation_test, exec_size_less_than_width) { brw_ADD(p, g0, g0, g0); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_16); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_16); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_16); EXPECT_FALSE(validate(p)); } @@ -620,14 +620,14 @@ TEST_P(validation_test, exec_size_less_than_width) TEST_P(validation_test, vertical_stride_is_width_by_horizontal_stride) { brw_ADD(p, g0, g0, g0); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); EXPECT_FALSE(validate(p)); } @@ -638,18 +638,18 @@ TEST_P(validation_test, vertical_stride_is_width_by_horizontal_stride) TEST_P(validation_test, horizontal_stride_must_be_0_if_width_is_1) { brw_ADD(p, g0, g0, g0); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); EXPECT_FALSE(validate(p)); } @@ -660,20 +660,20 @@ TEST_P(validation_test, scalar_region_must_be_0_1_0) struct brw_reg g0_0 = brw_vec1_grf(0, 0); brw_ADD(p, g0, g0, g0_0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_1); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_1); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_1); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_1); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0_0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_1); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_1); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_1); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_1); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); EXPECT_FALSE(validate(p)); } @@ -684,18 +684,18 @@ TEST_P(validation_test, scalar_region_must_be_0_1_0) TEST_P(validation_test, zero_stride_implies_0_1_0) { brw_ADD(p, g0, g0, g0); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); EXPECT_FALSE(validate(p)); } @@ -704,7 +704,7 @@ TEST_P(validation_test, zero_stride_implies_0_1_0) TEST_P(validation_test, dst_horizontal_stride_0) { brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); EXPECT_FALSE(validate(p)); @@ -717,7 +717,7 @@ TEST_P(validation_test, dst_horizontal_stride_0) brw_set_default_access_mode(p, BRW_ALIGN_16); brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); EXPECT_FALSE(validate(p)); } @@ -728,32 +728,32 @@ TEST_P(validation_test, dst_horizontal_stride_0) TEST_P(validation_test, must_not_cross_grf_boundary_in_a_width) { brw_ADD(p, g0, g0, g0); - brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 4); + brw_eu_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 4); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_src1_da1_subreg_nr(&devinfo, last_inst, 4); + brw_eu_inst_set_src1_da1_subreg_nr(&devinfo, last_inst, 4); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_FALSE(validate(p)); } @@ -768,14 +768,14 @@ TEST_P(validation_test, dst_hstride_on_align16_must_be_1) brw_set_default_access_mode(p, BRW_ALIGN_16); brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); EXPECT_TRUE(validate(p)); } @@ -805,7 +805,7 @@ TEST_P(validation_test, vstride_on_align16_must_be_0_or_4) for (unsigned i = 0; i < ARRAY_SIZE(vstride); i++) { brw_ADD(p, g0, g0, g0); - brw_inst_set_src0_vstride(&devinfo, last_inst, vstride[i].vstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, vstride[i].vstride); EXPECT_EQ(vstride[i].expected_result, validate(p)); @@ -814,7 +814,7 @@ TEST_P(validation_test, vstride_on_align16_must_be_0_or_4) for (unsigned i = 0; i < ARRAY_SIZE(vstride); i++) { brw_ADD(p, g0, g0, g0); - brw_inst_set_src1_vstride(&devinfo, last_inst, vstride[i].vstride); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, vstride[i].vstride); EXPECT_EQ(vstride[i].expected_result, validate(p)); @@ -830,34 +830,34 @@ TEST_P(validation_test, source_cannot_span_more_than_2_registers) enum brw_reg_type type = devinfo.ver >= 20 ? BRW_TYPE_D : BRW_TYPE_W; brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_src1_da1_subreg_nr(&devinfo, last_inst, 2); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_src1_da1_subreg_nr(&devinfo, last_inst, 2); EXPECT_TRUE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); EXPECT_TRUE(validate(p)); } @@ -868,29 +868,29 @@ TEST_P(validation_test, destination_cannot_span_more_than_2_registers) unsigned invalid_stride = devinfo.ver >= 20 ? 4 : 2; brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32); - brw_inst_set_dst_hstride(&devinfo, last_inst, cvt(invalid_stride)); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, cvt(invalid_stride)); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); EXPECT_FALSE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_8); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 6); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_8); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 6); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); EXPECT_TRUE(validate(p)); } @@ -901,12 +901,12 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one) /* Writes to dest are to the lower OWord */ brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_TRUE(validate(p)); @@ -914,13 +914,13 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one) /* Writes to dest are to the upper OWord */ brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 16); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 16); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_TRUE(validate(p)); @@ -928,13 +928,13 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one) /* Writes to dest are evenly split between OWords */ brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_TRUE(validate(p)); @@ -942,17 +942,17 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one) /* Writes to dest are uneven between OWords */ brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 10); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 10); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, type); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); EXPECT_TRUE(validate(p)); } @@ -960,7 +960,7 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one) TEST_P(validation_test, dst_elements_must_be_evenly_split_between_registers) { brw_ADD(p, g0, g0, g0); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 4); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 4); if (devinfo.verx10 < 125) { EXPECT_TRUE(validate(p)); @@ -971,7 +971,7 @@ TEST_P(validation_test, dst_elements_must_be_evenly_split_between_registers) clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); EXPECT_TRUE(validate(p)); @@ -984,7 +984,7 @@ TEST_P(validation_test, dst_elements_must_be_evenly_split_between_registers) clear_instructions(p); gfx6_math(p, g0, BRW_MATH_FUNCTION_SIN, g0, null); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 4); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 4); EXPECT_FALSE(validate(p)); } @@ -992,15 +992,15 @@ TEST_P(validation_test, dst_elements_must_be_evenly_split_between_registers) TEST_P(validation_test, two_src_two_dst_source_offsets_must_be_same) { brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4); - brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 16); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_2); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4); + brw_eu_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 16); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_2); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); if (devinfo.verx10 >= 125) { EXPECT_FALSE(validate(p)); @@ -1011,14 +1011,14 @@ TEST_P(validation_test, two_src_two_dst_source_offsets_must_be_same) clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_8); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_8); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); if (devinfo.verx10 >= 125) EXPECT_FALSE(validate(p)); @@ -1029,25 +1029,25 @@ TEST_P(validation_test, two_src_two_dst_source_offsets_must_be_same) TEST_P(validation_test, two_src_two_dst_each_dst_must_be_derived_from_one_src) { brw_MOV(p, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 8); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 8); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); EXPECT_TRUE(validate(p)); clear_instructions(p); brw_MOV(p, g0, g0); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 16); - brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 8); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_2); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 16); + brw_eu_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 8); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_2); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); if (devinfo.verx10 >= 125) { EXPECT_FALSE(validate(p)); @@ -1061,65 +1061,65 @@ TEST_P(validation_test, one_src_two_dst) struct brw_reg g0_0 = brw_vec1_grf(0, 0); brw_ADD(p, g0, g0_0, g0_0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); EXPECT_TRUE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); EXPECT_TRUE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); EXPECT_TRUE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_D); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); EXPECT_TRUE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); EXPECT_TRUE(validate(p)); clear_instructions(p); brw_ADD(p, g0, g0, g0); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); - brw_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); + brw_eu_inst_set_src1_file_type(&devinfo, last_inst, FIXED_GRF, BRW_TYPE_W); EXPECT_TRUE(validate(p)); } @@ -1160,9 +1160,9 @@ TEST_P(validation_test, packed_byte_destination) for (unsigned i = 0; i < ARRAY_SIZE(move); i++) { brw_MOV(p, retype(g0, move[i].dst_type), retype(g0, move[i].src_type)); - brw_inst_set_src0_negate(&devinfo, last_inst, move[i].neg); - brw_inst_set_src0_abs(&devinfo, last_inst, move[i].abs); - brw_inst_set_saturate(&devinfo, last_inst, move[i].sat); + brw_eu_inst_set_src0_negate(&devinfo, last_inst, move[i].neg); + brw_eu_inst_set_src0_abs(&devinfo, last_inst, move[i].abs); + brw_eu_inst_set_saturate(&devinfo, last_inst, move[i].sat); EXPECT_EQ(move[i].expected_result, validate(p)); @@ -1172,7 +1172,7 @@ TEST_P(validation_test, packed_byte_destination) brw_SEL(p, retype(g0, BRW_TYPE_UB), retype(g0, BRW_TYPE_UB), retype(g0, BRW_TYPE_UB)); - brw_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); + brw_eu_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); EXPECT_FALSE(validate(p)); @@ -1181,7 +1181,7 @@ TEST_P(validation_test, packed_byte_destination) brw_SEL(p, retype(g0, BRW_TYPE_B), retype(g0, BRW_TYPE_B), retype(g0, BRW_TYPE_B)); - brw_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); + brw_eu_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); EXPECT_FALSE(validate(p)); } @@ -1191,8 +1191,8 @@ TEST_P(validation_test, byte_destination_relaxed_alignment) brw_SEL(p, retype(g0, BRW_TYPE_B), retype(g0, BRW_TYPE_W), retype(g0, BRW_TYPE_W)); - brw_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); EXPECT_TRUE(validate(p)); @@ -1201,9 +1201,9 @@ TEST_P(validation_test, byte_destination_relaxed_alignment) brw_SEL(p, retype(g0, BRW_TYPE_B), retype(g0, BRW_TYPE_W), retype(g0, BRW_TYPE_W)); - brw_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 1); + brw_eu_inst_set_pred_control(&devinfo, last_inst, BRW_PREDICATE_NORMAL); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 1); EXPECT_TRUE(validate(p)); } @@ -1259,7 +1259,7 @@ TEST_P(validation_test, byte_64bit_conversion) continue; brw_MOV(p, retype(g0, inst[i].dst_type), retype(g0, inst[i].src_type)); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); EXPECT_EQ(inst[i].expected_result, validate(p)); clear_instructions(p); @@ -1353,19 +1353,19 @@ TEST_P(validation_test, half_float_conversion) brw_MOV(p, retype(g0, inst[i].dst_type), retype(g0, inst[i].src_type)); - brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); + brw_eu_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, inst[i].dst_subnr); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, inst[i].dst_subnr); if (inst[i].src_type == BRW_TYPE_B) { - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2); } else { - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); } if (devinfo.verx10 >= 125) { @@ -1433,9 +1433,9 @@ TEST_P(validation_test, mixed_float_source_indirect_addressing) retype(g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_dst_address_mode(&devinfo, last_inst, inst[i].dst_indirect); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_src0_address_mode(&devinfo, last_inst, inst[i].src0_indirect); + brw_eu_inst_set_dst_address_mode(&devinfo, last_inst, inst[i].dst_indirect); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_src0_address_mode(&devinfo, last_inst, inst[i].src0_indirect); if (devinfo.verx10 >= 125) { EXPECT_EQ(inst[i].gfx125_expected_result, validate(p)); @@ -1490,9 +1490,9 @@ TEST_P(validation_test, mixed_float_align1_simd16) retype(g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); if (devinfo.verx10 >= 125) { EXPECT_EQ(inst[i].gfx125_expected_result, validate(p)); @@ -1558,9 +1558,9 @@ TEST_P(validation_test, mixed_float_align1_packed_fp16_dst_acc_read_offset_0) retype(inst[i].read_acc ? acc0 : g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].subnr); + brw_eu_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].subnr); if (devinfo.verx10 >= 125) EXPECT_EQ(inst[i].expected_result_gfx125, validate(p)); @@ -1638,9 +1638,9 @@ TEST_P(validation_test, mixed_float_fp16_dest_with_acc) retype(g0, inst[i].src1_type)); } - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); if (devinfo.verx10 >= 125) EXPECT_EQ(inst[i].expected_result_gfx125, validate(p)); @@ -1698,15 +1698,15 @@ TEST_P(validation_test, mixed_float_align1_math_strided_fp16_inputs) retype(g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src0_stride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src0_stride); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, inst[i].src1_stride); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, inst[i].src1_stride); if (devinfo.verx10 >= 125) EXPECT_EQ(inst[i].expected_result_gfx125, validate(p)); @@ -1772,18 +1772,18 @@ TEST_P(validation_test, mixed_float_align1_packed_fp16_dst) retype(g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, inst[i].dst_subnr); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, inst[i].dst_subnr); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); - brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); if (devinfo.verx10 >= 125) EXPECT_EQ(inst[i].expected_result_gfx125, validate(p)); @@ -1843,8 +1843,8 @@ TEST_P(validation_test, mixed_float_align16_packed_data) retype(g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src0_vstride); - brw_inst_set_src1_vstride(&devinfo, last_inst, inst[i].src1_vstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src0_vstride); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, inst[i].src1_vstride); EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -1894,10 +1894,10 @@ TEST_P(validation_test, mixed_float_align16_no_simd16) retype(g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -1945,8 +1945,8 @@ TEST_P(validation_test, mixed_float_align16_no_acc_read) retype(inst[i].read_acc ? acc0 : g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); - brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4); EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -2001,8 +2001,8 @@ TEST_P(validation_test, mixed_float_align16_math_packed_format) retype(g0, inst[i].src0_type), retype(g0, inst[i].src1_type)); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src0_vstride); - brw_inst_set_src1_vstride(&devinfo, last_inst, inst[i].src1_vstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src0_vstride); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, inst[i].src1_vstride); EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -2034,8 +2034,8 @@ TEST_P(validation_test, vector_immediate_destination_alignment) for (unsigned i = 0; i < ARRAY_SIZE(move); i++) { brw_MOV(p, retype(g0, move[i].dst_type), retype(zero, move[i].src_type)); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, move[i].subnr); - brw_inst_set_exec_size(&devinfo, last_inst, move[i].exec_size); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, move[i].subnr); + brw_eu_inst_set_exec_size(&devinfo, last_inst, move[i].exec_size); EXPECT_EQ(move[i].expected_result, validate(p)); @@ -2071,7 +2071,7 @@ TEST_P(validation_test, vector_immediate_destination_stride) for (unsigned i = 0; i < ARRAY_SIZE(move); i++) { brw_MOV(p, retype(g0, move[i].dst_type), retype(zero, move[i].src_type)); - brw_inst_set_dst_hstride(&devinfo, last_inst, move[i].stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, move[i].stride); EXPECT_EQ(move[i].expected_result, validate(p)); @@ -2242,16 +2242,16 @@ TEST_P(validation_test, qword_low_power_align1_regioning_restrictions) retype(g0, inst[i].src_type), retype(zero, inst[i].src_type)); } - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); - brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, inst[i].dst_subreg); - brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].src_subreg); + brw_eu_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, inst[i].dst_subreg); + brw_eu_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].src_subreg); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); - brw_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); - brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); + brw_eu_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); if (intel_device_info_is_9lp(&devinfo)) { EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -2370,16 +2370,16 @@ TEST_P(validation_test, qword_low_power_no_indirect_addressing) retype(g0, inst[i].src_type), retype(zero, inst[i].src_type)); } - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); - brw_inst_set_dst_address_mode(&devinfo, last_inst, inst[i].dst_is_indirect); - brw_inst_set_src0_address_mode(&devinfo, last_inst, inst[i].src_is_indirect); + brw_eu_inst_set_dst_address_mode(&devinfo, last_inst, inst[i].dst_is_indirect); + brw_eu_inst_set_src0_address_mode(&devinfo, last_inst, inst[i].src_is_indirect); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); - brw_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); - brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); + brw_eu_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); if (intel_device_info_is_9lp(&devinfo)) { EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -2513,17 +2513,17 @@ TEST_P(validation_test, qword_low_power_no_64bit_arf) brw_MUL(p, retype(inst[i].dst, inst[i].dst_type), retype(inst[i].src, inst[i].src_type), retype(zero, inst[i].src_type)); - brw_inst_set_opcode(&isa, last_inst, inst[i].opcode); + brw_eu_inst_set_opcode(&isa, last_inst, inst[i].opcode); } - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); if (devinfo.ver < 20) - brw_inst_set_acc_wr_control(&devinfo, last_inst, inst[i].acc_wr); + brw_eu_inst_set_acc_wr_control(&devinfo, last_inst, inst[i].acc_wr); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); - brw_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); - brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); + brw_eu_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); if (intel_device_info_is_9lp(&devinfo)) { EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -2610,7 +2610,7 @@ TEST_P(validation_test, align16_64_bit_integer) retype(g0, inst[i].src_type), retype(g0, inst[i].src_type)); } - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -2724,16 +2724,16 @@ TEST_P(validation_test, qword_low_power_no_depctrl) retype(g0, inst[i].src_type), retype(zero, inst[i].src_type)); } - brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); + brw_eu_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size); - brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); - brw_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); - brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].src_vstride); + brw_eu_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride); - brw_inst_set_no_dd_check(&devinfo, last_inst, inst[i].no_dd_check); - brw_inst_set_no_dd_clear(&devinfo, last_inst, inst[i].no_dd_clear); + brw_eu_inst_set_no_dd_check(&devinfo, last_inst, inst[i].no_dd_check); + brw_eu_inst_set_no_dd_clear(&devinfo, last_inst, inst[i].no_dd_clear); if (intel_device_info_is_9lp(&devinfo)) { EXPECT_EQ(inst[i].expected_result, validate(p)); @@ -2825,38 +2825,38 @@ TEST_P(validation_test, gfx11_no_byte_src_1_2) case BRW_OPCODE_MOV: brw_MOV(p, retype(g0, inst[i].dst_type), retype(g0, inst[i].srcs[0].type)); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); - brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); break; case BRW_OPCODE_ADD: brw_ADD(p, retype(g0, inst[i].dst_type), retype(g0, inst[i].srcs[0].type), retype(g0, inst[i].srcs[1].type)); - brw_inst_set_src0_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); - brw_inst_set_src0_width(&devinfo, last_inst, inst[i].srcs[0].width); - brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); - brw_inst_set_src1_vstride(&devinfo, last_inst, inst[i].srcs[1].vstride); - brw_inst_set_src1_width(&devinfo, last_inst, inst[i].srcs[1].width); - brw_inst_set_src1_hstride(&devinfo, last_inst, inst[i].srcs[1].hstride); + brw_eu_inst_set_src0_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); + brw_eu_inst_set_src0_width(&devinfo, last_inst, inst[i].srcs[0].width); + brw_eu_inst_set_src0_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); + brw_eu_inst_set_src1_vstride(&devinfo, last_inst, inst[i].srcs[1].vstride); + brw_eu_inst_set_src1_width(&devinfo, last_inst, inst[i].srcs[1].width); + brw_eu_inst_set_src1_hstride(&devinfo, last_inst, inst[i].srcs[1].hstride); break; case BRW_OPCODE_MAD: brw_MAD(p, retype(g0, inst[i].dst_type), retype(g0, inst[i].srcs[0].type), retype(g0, inst[i].srcs[1].type), retype(g0, inst[i].srcs[2].type)); - brw_inst_set_3src_a1_src0_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); - brw_inst_set_3src_a1_src0_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); - brw_inst_set_3src_a1_src1_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); - brw_inst_set_3src_a1_src1_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); + brw_eu_inst_set_3src_a1_src0_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); + brw_eu_inst_set_3src_a1_src0_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); + brw_eu_inst_set_3src_a1_src1_vstride(&devinfo, last_inst, inst[i].srcs[0].vstride); + brw_eu_inst_set_3src_a1_src1_hstride(&devinfo, last_inst, inst[i].srcs[0].hstride); break; default: unreachable("invalid opcode"); } - brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); - brw_inst_set_src0_width(&devinfo, last_inst, inst[i].srcs[0].width); - brw_inst_set_src1_width(&devinfo, last_inst, inst[i].srcs[1].width); + brw_eu_inst_set_src0_width(&devinfo, last_inst, inst[i].srcs[0].width); + brw_eu_inst_set_src1_width(&devinfo, last_inst, inst[i].srcs[1].width); brw_pop_insn_state(p); @@ -3159,9 +3159,9 @@ TEST_P(validation_test, dpas_sub_byte_precision) retype(brw_vec8_grf(32, 0), test_vectors[i].src1_type), retype(brw_vec8_grf(48, 0), test_vectors[i].src2_type)); - brw_inst_set_dpas_3src_src1_subbyte(&devinfo, inst, + brw_eu_inst_set_dpas_3src_src1_subbyte(&devinfo, inst, test_vectors[i].src1_prec); - brw_inst_set_dpas_3src_src2_subbyte(&devinfo, inst, + brw_eu_inst_set_dpas_3src_src2_subbyte(&devinfo, inst, test_vectors[i].src2_prec); EXPECT_EQ(test_vectors[i].expected_result, validate(p)) << @@ -3708,8 +3708,8 @@ TEST_P(validation_test, scalar_register_restrictions) unreachable("unexpected opcode in tests"); } - brw_inst_set_exec_size(&devinfo, last_inst, cvt(t.exec_size) - 1); - brw_inst_set_cond_modifier(&devinfo, last_inst, t.opts.cmod); + brw_eu_inst_set_exec_size(&devinfo, last_inst, cvt(t.exec_size) - 1); + brw_eu_inst_set_cond_modifier(&devinfo, last_inst, t.opts.cmod); EXPECT_EQ(t.expected_result, validate(p)) << "test vector index = " << i;