diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index f27a5e78179..66bb997103e 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -229,296 +229,6 @@ fail:
  * pipe_screen
  */
 
-static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
-{
-	struct r600_screen *rscreen = (struct r600_screen *)pscreen;
-	enum radeon_family family = rscreen->b.family;
-
-	switch (param) {
-	/* Supported features (boolean caps). */
-	case PIPE_CAP_NPOT_TEXTURES:
-	case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
-	case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
-	case PIPE_CAP_ANISOTROPIC_FILTER:
-	case PIPE_CAP_OCCLUSION_QUERY:
-	case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
-	case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
-	case PIPE_CAP_BLEND_EQUATION_SEPARATE:
-	case PIPE_CAP_TEXTURE_SWIZZLE:
-	case PIPE_CAP_DEPTH_CLIP_DISABLE:
-	case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
-	case PIPE_CAP_SHADER_STENCIL_EXPORT:
-	case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
-	case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
-	case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
-	case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
-	case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
-	case PIPE_CAP_SEAMLESS_CUBE_MAP:
-	case PIPE_CAP_PRIMITIVE_RESTART:
-	case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
-	case PIPE_CAP_CONDITIONAL_RENDER:
-	case PIPE_CAP_TEXTURE_BARRIER:
-	case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
-	case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
-	case PIPE_CAP_VS_INSTANCEID:
-	case PIPE_CAP_START_INSTANCE:
-	case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
-	case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
-	case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
-	case PIPE_CAP_TEXTURE_MULTISAMPLE:
-	case PIPE_CAP_VS_WINDOW_SPACE_POSITION:
-	case PIPE_CAP_VS_LAYER_VIEWPORT:
-	case PIPE_CAP_SAMPLE_SHADING:
-        case PIPE_CAP_MEMOBJ:
-	case PIPE_CAP_CLIP_HALFZ:
-	case PIPE_CAP_POLYGON_OFFSET_CLAMP:
-	case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
-	case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
-	case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
-	case PIPE_CAP_TEXTURE_QUERY_SAMPLES:
-	case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
-	case PIPE_CAP_INVALIDATE_BUFFER:
-	case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
-	case PIPE_CAP_QUERY_MEMORY_INFO:
-	case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
-	case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
-	case PIPE_CAP_LEGACY_MATH_RULES:
-	case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
-	case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
-	case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
-      return 1;
-
-	case PIPE_CAP_VERTEX_INPUT_ALIGNMENT:
-		return PIPE_VERTEX_INPUT_ALIGNMENT_4BYTE;
-
-	case PIPE_CAP_NIR_ATOMICS_AS_DEREF:
-	case PIPE_CAP_GL_SPIRV:
-		return 1;
-
-	case PIPE_CAP_TEXTURE_TRANSFER_MODES:
-		return PIPE_TEXTURE_TRANSFER_BLIT;
-
-	case PIPE_CAP_SHAREABLE_SHADERS:
-		return 0;
-
-	case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
-		/* Optimal number for good TexSubImage performance on Polaris10. */
-		return 64 * 1024 * 1024;
-
-	case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
-		return 1;
-
-	case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
-		return !UTIL_ARCH_BIG_ENDIAN && rscreen->b.info.has_userptr;
-
-	case PIPE_CAP_COMPUTE:
-		return rscreen->b.gfx_level > R700;
-
-	case PIPE_CAP_TGSI_TEXCOORD:
-		return 1;
-
-	case PIPE_CAP_NIR_IMAGES_AS_DEREF:
-	case PIPE_CAP_FAKE_SW_MSAA:
-		return 0;
-
-	case PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT:
-		return MIN2(rscreen->b.info.max_heap_size_kb * 1024ull / 4, INT_MAX);
-
-        case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
-                return R600_MAP_BUFFER_ALIGNMENT;
-
-	case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
-		return 256;
-
-	case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
-		return 4;
-	case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
-	case PIPE_CAP_GLSL_FEATURE_LEVEL:
-		if (family >= CHIP_CEDAR)
-		   return 450;
-		return 330;
-
-	/* Supported except the original R600. */
-	case PIPE_CAP_INDEP_BLEND_ENABLE:
-	case PIPE_CAP_INDEP_BLEND_FUNC:
-		/* R600 doesn't support per-MRT blends */
-		return family == CHIP_R600 ? 0 : 1;
-
-	/* Supported on Evergreen. */
-	case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
-	case PIPE_CAP_CUBE_MAP_ARRAY:
-	case PIPE_CAP_TEXTURE_GATHER_SM5:
-	case PIPE_CAP_TEXTURE_QUERY_LOD:
-	case PIPE_CAP_FS_FINE_DERIVATIVE:
-	case PIPE_CAP_SAMPLER_VIEW_TARGET:
-	case PIPE_CAP_SHADER_PACK_HALF_FLOAT:
-	case PIPE_CAP_SHADER_CLOCK:
-	case PIPE_CAP_SHADER_ARRAY_COMPONENTS:
-	case PIPE_CAP_QUERY_BUFFER_OBJECT:
-	case PIPE_CAP_IMAGE_STORE_FORMATTED:
-	case PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL:
-		return family >= CHIP_CEDAR ? 1 : 0;
-	case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
-		return family >= CHIP_CEDAR ? 4 : 0;
-	case PIPE_CAP_DRAW_INDIRECT:
-		/* kernel command checker support is also required */
-		return family >= CHIP_CEDAR;
-
-	case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
-		return family >= CHIP_CEDAR ? 0 : 1;
-
-	case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
-		return 8;
-
-	case PIPE_CAP_MAX_GS_INVOCATIONS:
-		return 32;
-
-	/* shader buffer objects */
-	case PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT:
-		return 1 << 27;
-	case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
-		return 8;
-
-        case PIPE_CAP_INT64:
-	case PIPE_CAP_DOUBLES:
-		if (rscreen->b.family == CHIP_ARUBA ||
-		    rscreen->b.family == CHIP_CAYMAN ||
-		    rscreen->b.family == CHIP_CYPRESS ||
-		    rscreen->b.family == CHIP_HEMLOCK)
-			return 1;
-		if (rscreen->b.family >= CHIP_CEDAR)
-			return 1;
-		return 0;
-
-	case PIPE_CAP_TWO_SIDED_COLOR:
-		return 0;
-	case PIPE_CAP_CULL_DISTANCE:
-		return 1;
-
-	case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
-		if (family >= CHIP_CEDAR)
-			return 256;
-		return 0;
-
-	case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
-		if (family >= CHIP_CEDAR)
-			return 30;
-		else
-			return 0;
-	/* Stream output. */
-	case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
-		return rscreen->b.has_streamout ? 4 : 0;
-	case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
-	case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
-		return rscreen->b.has_streamout ? 1 : 0;
-	case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
-	case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
-		return 32*4;
-
-	/* Geometry shader output. */
-	case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
-		return 1024;
-	case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
-		return 16384;
-	case PIPE_CAP_MAX_VERTEX_STREAMS:
-		return family >= CHIP_CEDAR ? 4 : 1;
-
-	case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
-		/* Should be 2047, but 2048 is a requirement for GL 4.4 */
-		return 2048;
-
-	/* Texturing. */
-	case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
-		if (family >= CHIP_CEDAR)
-			return 16384;
-		else
-			return 8192;
-	case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
-		if (family >= CHIP_CEDAR)
-			return 15;
-		else
-			return 14;
-	case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
-		/* textures support 8192, but layered rendering supports 2048 */
-		return 12;
-	case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
-		/* textures support 8192, but layered rendering supports 2048 */
-		return 2048;
-
-	/* Render targets. */
-	case PIPE_CAP_MAX_RENDER_TARGETS:
-		/* XXX some r6xx are buggy and can only do 4 */
-		return 8;
-
-	case PIPE_CAP_MAX_VIEWPORTS:
-		return R600_MAX_VIEWPORTS;
-	case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
-	case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
-		return 8;
-
-	/* Timer queries, present when the clock frequency is non zero. */
-	case PIPE_CAP_QUERY_TIME_ELAPSED:
-	case PIPE_CAP_QUERY_TIMESTAMP:
-		return rscreen->b.info.clock_crystal_freq != 0;
-
-	case PIPE_CAP_TIMER_RESOLUTION:
-		/* Conversion to nanos from cycles per millisecond */
-		return DIV_ROUND_UP(1000000, rscreen->b.info.clock_crystal_freq);
-
-	case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
-	case PIPE_CAP_MIN_TEXEL_OFFSET:
-		return -8;
-
-	case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
-	case PIPE_CAP_MAX_TEXEL_OFFSET:
-		return 7;
-
-	case PIPE_CAP_MAX_VARYINGS:
-		return 32;
-
-	case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
-		return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600;
-	case PIPE_CAP_ENDIANNESS:
-		return PIPE_ENDIAN_LITTLE;
-
-	case PIPE_CAP_VENDOR_ID:
-		return ATI_VENDOR_ID;
-	case PIPE_CAP_DEVICE_ID:
-		return rscreen->b.info.pci_id;
-	case PIPE_CAP_ACCELERATED:
-		return 1;
-	case PIPE_CAP_VIDEO_MEMORY:
-		return rscreen->b.info.vram_size_kb >> 10;
-	case PIPE_CAP_UMA:
-		return 0;
-	case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
-		return rscreen->b.gfx_level >= R700;
-	case PIPE_CAP_PCI_GROUP:
-		return rscreen->b.info.pci.domain;
-	case PIPE_CAP_PCI_BUS:
-		return rscreen->b.info.pci.bus;
-	case PIPE_CAP_PCI_DEVICE:
-		return rscreen->b.info.pci.dev;
-	case PIPE_CAP_PCI_FUNCTION:
-		return rscreen->b.info.pci.func;
-
-	case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
-		if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
-			return 8;
-		return 0;
-	case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
-		if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
-			return EG_MAX_ATOMIC_BUFFERS;
-		return 0;
-
-	case PIPE_CAP_VALIDATE_ALL_DIRTY_STATES:
-		return 1;
-
-	default:
-		return u_pipe_screen_get_param_defaults(pscreen, param);
-	}
-}
-
 static int r600_get_shader_param(struct pipe_screen* pscreen,
 				 enum pipe_shader_type shader,
 				 enum pipe_shader_cap param)
@@ -881,7 +591,6 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws,
 	/* Set functions first. */
 	rscreen->b.b.context_create = r600_create_context;
 	rscreen->b.b.destroy = r600_destroy_screen;
-	rscreen->b.b.get_param = r600_get_param;
 	rscreen->b.b.get_shader_param = r600_get_shader_param;
 	rscreen->b.b.resource_create = r600_resource_create;
 
diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c
index ddc36be1941..1781378873f 100644
--- a/src/gallium/drivers/r600/r600_pipe_common.c
+++ b/src/gallium/drivers/r600/r600_pipe_common.c
@@ -773,37 +773,6 @@ static const char* r600_get_name(struct pipe_screen* pscreen)
 	return rscreen->renderer_string;
 }
 
-static float r600_get_paramf(struct pipe_screen* pscreen,
-			     enum pipe_capf param)
-{
-	switch (param) {
-	case PIPE_CAPF_MIN_LINE_WIDTH:
-	case PIPE_CAPF_MIN_LINE_WIDTH_AA:
-	case PIPE_CAPF_MIN_POINT_SIZE:
-	case PIPE_CAPF_MIN_POINT_SIZE_AA:
-		return 1;
-
-	case PIPE_CAPF_POINT_SIZE_GRANULARITY:
-	case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
-		return 0.1;
-
-	case PIPE_CAPF_MAX_LINE_WIDTH:
-	case PIPE_CAPF_MAX_LINE_WIDTH_AA:
-	case PIPE_CAPF_MAX_POINT_SIZE:
-	case PIPE_CAPF_MAX_POINT_SIZE_AA:
-         return 8191.0f;
-	case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
-		return 16.0f;
-	case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
-		return 16.0f;
-    case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
-    case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
-    case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
-        return 0.0f;
-	}
-	return 0.0f;
-}
-
 static int r600_get_video_param(struct pipe_screen *screen,
 				enum pipe_video_profile profile,
 				enum pipe_video_entrypoint entrypoint,
@@ -1266,7 +1235,6 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 	rscreen->b.get_disk_shader_cache = r600_get_disk_shader_cache;
 	rscreen->b.get_compute_param = r600_get_compute_param;
 	rscreen->b.get_screen_fd = r600_get_screen_fd;
-	rscreen->b.get_paramf = r600_get_paramf;
 	rscreen->b.get_timestamp = r600_get_timestamp;
 	rscreen->b.get_compiler_options = r600_get_compiler_options;
 	rscreen->b.fence_finish = r600_fence_finish;