From 223476aff32c3956bb993cd4836e4204fb9e80a5 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Sat, 5 Jun 2021 14:38:15 -0400 Subject: [PATCH] agx: Model get_sr Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_opcodes.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/asahi/compiler/agx_opcodes.py b/src/asahi/compiler/agx_opcodes.py index 338cc45ab9a..6141adbe905 100644 --- a/src/asahi/compiler/agx_opcodes.py +++ b/src/asahi/compiler/agx_opcodes.py @@ -90,6 +90,7 @@ NEST = immediate("nest") INVERT_COND = immediate("invert_cond") NEST = immediate("nest") TARGET = immediate("target", "agx_block *") +SR = immediate("sr", "enum agx_sr") FUNOP = lambda x: (x << 28) FUNOP_MASK = FUNOP((1 << 14) - 1) @@ -176,6 +177,8 @@ op("device_load", op("wait", (0x38, 0xFF, 2, _), dests = 0, can_eliminate = False, imms = [SCOREBOARD]) +op("get_sr", (0x72, 0x7F | L, 4, _), dests = 1, imms = [SR]) + # Essentially same encoding op("ld_tile", (0x49, 0x7F, 8, _), dests = 1, srcs = 0, can_eliminate = False, imms = [FORMAT])