aco/validate: relax subdword restrictions
This affects constants/SGPRs on GFX6-8 and the operand regClass of SDWA instructions. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8260>
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21a7bea342
@@ -182,10 +182,6 @@ bool validate_ir(Program* program)
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"SDWA can't be used with this opcode", instr.get());
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}
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for (unsigned i = 0; i < MIN2(instr->operands.size(), 2); i++) {
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if (instr->operands[i].hasRegClass() && instr->operands[i].regClass().is_subdword())
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check((sdwa->sel[i] & sdwa_asuint) == (sdwa_isra | instr->operands[i].bytes()), "Unexpected SDWA sel for sub-dword operand", instr.get());
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}
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if (instr->definitions[0].regClass().is_subdword())
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check((sdwa->dst_sel & sdwa_asuint) == (sdwa_isra | instr->definitions[0].bytes()), "Unexpected SDWA sel for sub-dword definition", instr.get());
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}
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@@ -328,34 +324,6 @@ bool validate_ir(Program* program)
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switch (instr->format) {
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case Format::PSEUDO: {
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if (instr->opcode == aco_opcode::p_parallelcopy) {
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for (unsigned i = 0; i < instr->operands.size(); i++) {
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if (!instr->definitions[i].regClass().is_subdword())
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continue;
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Operand op = instr->operands[i];
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check(program->chip_class >= GFX9 || !op.isLiteral(), "Sub-dword copies cannot take literals", instr.get());
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if (op.isConstant() || (op.hasRegClass() && op.regClass().type() == RegType::sgpr))
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check(program->chip_class >= GFX9, "Sub-dword pseudo instructions can only take constants or SGPRs on GFX9+", instr.get());
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}
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} else {
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bool is_subdword = false;
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bool has_const_sgpr = false;
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bool has_literal = false;
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for (Definition def : instr->definitions)
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is_subdword |= def.regClass().is_subdword();
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for (unsigned i = 0; i < instr->operands.size(); i++) {
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if (instr->opcode == aco_opcode::p_extract_vector && i == 1)
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continue;
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Operand op = instr->operands[i];
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is_subdword |= op.hasRegClass() && op.regClass().is_subdword();
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has_const_sgpr |= op.isConstant() || (op.hasRegClass() && op.regClass().type() == RegType::sgpr);
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has_literal |= op.isLiteral();
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}
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check(!is_subdword || !has_const_sgpr || program->chip_class >= GFX9 || instr->opcode == aco_opcode::p_unit_test,
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"Sub-dword pseudo instructions can only take constants or SGPRs on GFX9+", instr.get());
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}
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if (instr->opcode == aco_opcode::p_create_vector) {
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unsigned size = 0;
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for (const Operand& op : instr->operands) {
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@@ -374,6 +342,8 @@ bool validate_ir(Program* program)
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check((instr->operands[1].constantValue() + 1) * instr->definitions[0].bytes() <= instr->operands[0].bytes(), "Index out of range", instr.get());
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check(instr->definitions[0].getTemp().type() == RegType::vgpr || instr->operands[0].regClass().type() == RegType::sgpr,
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"Cannot extract SGPR value from VGPR vector", instr.get());
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check(program->chip_class >= GFX9 || !instr->definitions[0].regClass().is_subdword() ||
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instr->operands[0].regClass().type() == RegType::vgpr, "Cannot extract subdword from SGPR before GFX9+", instr.get());
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} else if (instr->opcode == aco_opcode::p_split_vector) {
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check(instr->operands[0].isTemp(), "Operand must be a temporary", instr.get());
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unsigned size = 0;
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@@ -384,6 +354,9 @@ bool validate_ir(Program* program)
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if (instr->operands[0].getTemp().type() == RegType::vgpr) {
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for (const Definition& def : instr->definitions)
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check(def.regClass().type() == RegType::vgpr, "Wrong Definition type for VGPR split_vector", instr.get());
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} else {
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for (const Definition& def : instr->definitions)
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check(program->chip_class >= GFX9 || !def.regClass().is_subdword(), "Cannot split SGPR into subdword VGPRs before GFX9+", instr.get());
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}
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} else if (instr->opcode == aco_opcode::p_parallelcopy) {
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check(instr->definitions.size() == instr->operands.size(), "Number of Operands does not match number of Definitions", instr.get());
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