From 1f2ad64b63944257075f798e9f009c002102cbee Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 2 Oct 2024 11:48:50 +0300 Subject: [PATCH] anv: optimize WA 16011107343/22018402687 No need to emit the instruction twice. Signed-off-by: Lionel Landwerlin Backport-to: 24.2 Reviewed-by: Rohan Garg Part-of: --- src/intel/vulkan/genX_gfx_state.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/intel/vulkan/genX_gfx_state.c b/src/intel/vulkan/genX_gfx_state.c index 775db2267ab..8eb550a512d 100644 --- a/src/intel/vulkan/genX_gfx_state.c +++ b/src/intel/vulkan/genX_gfx_state.c @@ -1683,6 +1683,20 @@ cmd_buffer_gfx_state_emission(struct anv_cmd_buffer *cmd_buffer) const bool protected = cmd_buffer->vk.pool->flags & VK_COMMAND_POOL_CREATE_PROTECTED_BIT; +#if INTEL_WA_16011107343_GFX_VER + /* Will be emitted in front of every draw instead */ + if (intel_needs_workaround(cmd_buffer->device->info, 16011107343) && + anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_CTRL)) + BITSET_CLEAR(hw_state->dirty, ANV_GFX_STATE_HS); +#endif + +#if INTEL_WA_22018402687_GFX_VER + /* Will be emitted in front of every draw instead */ + if (intel_needs_workaround(cmd_buffer->device->info, 22018402687) && + anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) + BITSET_CLEAR(hw_state->dirty, ANV_GFX_STATE_DS); +#endif + if (BITSET_TEST(hw_state->dirty, ANV_GFX_STATE_URB)) { genX(urb_workaround)(cmd_buffer, &pipeline->urb_cfg);