From 1d72d3feb6427752427cd9f7e2e99070240b0884 Mon Sep 17 00:00:00 2001
From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Date: Fri, 2 Sep 2022 23:19:54 -0400
Subject: [PATCH] asahi: Fix "stride" for tiled textures

It doesn't exist, but there's a count of mip levels for writeable image
descs. Setting that appropriately matters at high mip levels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
---
 src/asahi/lib/cmdbuf.xml              | 13 ++++++++-----
 src/gallium/drivers/asahi/agx_state.c | 13 +++++++------
 2 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/src/asahi/lib/cmdbuf.xml b/src/asahi/lib/cmdbuf.xml
index ee58bddddd7..5ea0ea341bb 100644
--- a/src/asahi/lib/cmdbuf.xml
+++ b/src/asahi/lib/cmdbuf.xml
@@ -189,11 +189,13 @@
     <field name="Buffer" size="36" start="64" type="address" modifier="shr(4)"/>
     <!-- N.b. sRGB is not specified here -->
     <field name="Level" size="4" start="100" type="uint"/>
-    <!-- Off by 4? -->
-    <field name="Stride" size="24" start="104" type="hex" prefix="AGX_RT_STRIDE">
-      <value name="Tiled" value="0x100000"/>
-      <value name="Tiled, mipmapped" value="0x100009"/>
-    </field>
+
+    <!-- If layout is not linear -->
+    <field name="Levels" size="6" start="104" type="uint" modifier="minus(1)"/>
+    <field name="Unk tiled" size="1" start="124" type="bool"/>
+
+    <!-- If layout is linear. Off by 4? -->
+    <field name="Stride" size="24" start="104" type="hex"/>
 
     <!-- If layout is compressed -->
     <field name="Acceleration buffer" size="64" start="128" type="address"/>
@@ -240,6 +242,7 @@
     <field name="Stride" size="18" start="110" type="hex" modifier="shr(4)"/>
     <!-- Note that 3D/arrays cannot be linear. -->
     <field name="Depth" size="14" start="110" type="uint" modifier="minus(1)" default="1"/>
+    <field name="Unk tiled" size="1" start="126" type="bool"/>
   </struct>
 
   <enum name="Wrap">
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index 3116b345efa..dc80310a794 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -491,7 +491,7 @@ agx_create_sampler_view(struct pipe_context *pctx,
          cfg.stride = ail_get_linear_stride_B(&rsrc->layout, level) - 16;
       } else {
          assert(rsrc->modifier == DRM_FORMAT_MOD_APPLE_TWIDDLED);
-         cfg.stride = AGX_RT_STRIDE_TILED;
+         cfg.unk_tiled = true;
       }
    }
 
@@ -770,8 +770,8 @@ agx_set_framebuffer_state(struct pipe_context *pctx,
          if (tex->modifier == DRM_FORMAT_MOD_LINEAR) {
             cfg.stride = ail_get_linear_stride_B(&tex->layout, level) - 4;
          } else {
-            cfg.stride = tex->mipmapped ? AGX_RT_STRIDE_TILED_MIPMAPPED :
-                         AGX_RT_STRIDE_TILED;
+            cfg.unk_tiled = true;
+            cfg.levels = tex->base.last_level + 1;
          }
       };
    }
@@ -1358,9 +1358,10 @@ agx_build_reload_pipeline(struct agx_context *ctx, uint32_t code, struct pipe_su
       cfg.srgb = (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB);
       cfg.address = agx_map_texture_gpu(rsrc, level, layer);
 
-      cfg.stride = (rsrc->modifier == DRM_FORMAT_MOD_LINEAR) ?
-         (ail_get_linear_stride_B(&rsrc->layout, level) - 16) :
-         AGX_RT_STRIDE_TILED;
+      if (rsrc->modifier == DRM_FORMAT_MOD_LINEAR)
+         cfg.stride = ail_get_linear_stride_B(&rsrc->layout, level) - 16;
+      else
+         cfg.unk_tiled = true;
    }
 
    agx_pack(record, BIND_TEXTURE, cfg) {