From 1c7c4b480701107771016e7ea0d93b599131d0ff Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Fri, 24 Oct 2025 13:43:28 -0700 Subject: [PATCH] ir3: Add cat1 (sat) bit Appears to be present at least as far back as gen7. Signed-off-by: Rob Clark Part-of: --- src/freedreno/ir3/ir3.h | 1 + src/freedreno/ir3/ir3_parser.y | 1 + src/freedreno/ir3/ir3_print.c | 2 ++ src/freedreno/ir3/tests/disasm.c | 1 + src/freedreno/isa/ir3-cat1.xml | 21 +++++++++++---------- 5 files changed, 16 insertions(+), 10 deletions(-) diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h index 9e6bed53c8e..a2a9f774d3e 100644 --- a/src/freedreno/ir3/ir3.h +++ b/src/freedreno/ir3/ir3.h @@ -446,6 +446,7 @@ struct ir3_instruction { type_t src_type, dst_type; round_t round; reduce_op_t reduce_op; + bool sat; } cat1; struct { enum { diff --git a/src/freedreno/ir3/ir3_parser.y b/src/freedreno/ir3/ir3_parser.y index 37a0f6ca8e3..d3ea24e3cb9 100644 --- a/src/freedreno/ir3/ir3_parser.y +++ b/src/freedreno/ir3/ir3_parser.y @@ -1304,6 +1304,7 @@ const: T_CONSTANT { $$ = new_src($1, IR3_REG_CONST); } dst_reg_flag: T_EVEN { instr->cat1.round = ROUND_EVEN; } | T_POS_INFINITY { instr->cat1.round = ROUND_POS_INF; } | T_NEG_INFINITY { instr->cat1.round = ROUND_NEG_INF; } +| T_SAT { instr->cat1.sat = true; } | T_EI { rflags.flags |= IR3_REG_EI; } | T_WRMASK { rflags.wrmask = $1; } diff --git a/src/freedreno/ir3/ir3_print.c b/src/freedreno/ir3/ir3_print.c index 35e3c491a3a..fe308cf8cf5 100644 --- a/src/freedreno/ir3/ir3_print.c +++ b/src/freedreno/ir3/ir3_print.c @@ -441,6 +441,8 @@ print_instr(struct log_stream *stream, struct ir3_instruction *instr, int lvl) } if (opc_cat(instr->opc) == 1) { + if (instr->cat1.sat) + mesa_log_stream_printf(stream, "(sat)"); switch (instr->cat1.round) { case ROUND_ZERO: break; diff --git a/src/freedreno/ir3/tests/disasm.c b/src/freedreno/ir3/tests/disasm.c index 2b191a40607..396a9476c53 100644 --- a/src/freedreno/ir3/tests/disasm.c +++ b/src/freedreno/ir3/tests/disasm.c @@ -100,6 +100,7 @@ static const struct test { INSTR_7XX(200440c0_ae800004, "movs.f32f32 r48.x, r1.x, 93"), INSTR_7XX(201100c0_c000040b, "movs.s16s16 hr48.x, (last)hr2.w, a0.x"), + INSTR_7XX(201504c0_000000c0, "cov.s32s16 (sat)hr48.x, r48.x"), /* cat2 */ INSTR_6XX(40104002_0c210001, "add.f hr0.z, r0.y, c"), diff --git a/src/freedreno/isa/ir3-cat1.xml b/src/freedreno/isa/ir3-cat1.xml index a120515aed8..5566550878e 100644 --- a/src/freedreno/isa/ir3-cat1.xml +++ b/src/freedreno/isa/ir3-cat1.xml @@ -68,7 +68,7 @@ SOFTWARE. - 0 + @@ -81,6 +81,7 @@ SOFTWARE. !!(src->flags & IR3_INSTR_UL) !!(src->dsts[0]->flags & IR3_REG_RELATIV) src->cat1.round + src->cat1.sat @@ -118,7 +119,7 @@ SOFTWARE. ({DST} == 0xf4 /* a0.x */) && ({SRC_TYPE} == 4 /* s16 */) && ({DST_TYPE} == 4) - {SY}{SS}{JP}{REPEAT}{UL}mova {ROUND}a0.x, {SRC_R}{SRC} + {SY}{SS}{JP}{REPEAT}{UL}mova {ROUND}{DM}a0.x, {SRC_R}{SRC} 11110100 100 @@ -129,7 +130,7 @@ SOFTWARE. ({DST} == 0xf5 /* a0.y */) && ({SRC_TYPE} == 2 /* u16 */) && ({DST_TYPE} == 2) - {SY}{SS}{JP}{REPEAT}{UL}mova1 {ROUND}a1.x, {SRC_R}{SRC} + {SY}{SS}{JP}{REPEAT}{UL}mova1 {ROUND}{DM}a1.x, {SRC_R}{SRC} 11110101 010 @@ -140,11 +141,11 @@ SOFTWARE. {SRC_TYPE} != {DST_TYPE} - {SY}{SS}{JP}{REPEAT}{UL}cov.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC} + {SY}{SS}{JP}{REPEAT}{UL}cov.{SRC_TYPE}{DST_TYPE} {ROUND}{DM}{DST_HALF}{DST}, {SRC} - {SY}{SS}{JP}{REPEAT}{UL}mov.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC} + {SY}{SS}{JP}{REPEAT}{UL}mov.{SRC_TYPE}{DST_TYPE} {ROUND}{DM}{DST_HALF}{DST}, {SRC} @@ -316,7 +317,7 @@ SOFTWARE. - {SY}{SS}{JP}{REPEAT}{UL}movs.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC}, {INVOCATION} + {SY}{SS}{JP}{REPEAT}{UL}movs.{SRC_TYPE}{DST_TYPE} {ROUND}{DM}{DST_HALF}{DST}, {SRC}, {INVOCATION} @@ -329,7 +330,7 @@ SOFTWARE. - {SY}{SS}{JP}{REPEAT}{UL}movs.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC}, a0.x + {SY}{SS}{JP}{REPEAT}{UL}movs.{SRC_TYPE}{DST_TYPE} {ROUND}{DM}{DST_HALF}{DST}, {SRC}, a0.x 0000000 @@ -419,7 +420,7 @@ SOFTWARE. particular this can be used to swap two registers. - {SY}{SS}{JP}{UL}swz.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {DST1}, {SRC0}, {SRC1} + {SY}{SS}{JP}{UL}swz.{SRC_TYPE}{DST_TYPE} {ROUND}{DM}{DST0}, {DST1}, {SRC0}, {SRC1} @@ -443,7 +444,7 @@ SOFTWARE. GATher. Move SRC0 to DST0, SRC1 to DST0 + 1, SRC2 to DST0 + 2, and SRC3 to DST0 + 3. - {SY}{SS}{JP}{UL}gat.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {SRC0}, {SRC1}, {SRC2}, {SRC3} + {SY}{SS}{JP}{UL}gat.{SRC_TYPE}{DST_TYPE} {ROUND}{DM}{DST0}, {SRC0}, {SRC1}, {SRC2}, {SRC3} @@ -469,7 +470,7 @@ SOFTWARE. SCaTter. Move SRC0 to DST0, SRC0 + 1 to DST1, SRC0 + 2 to DST2 + 3, and SRC0 + 3 to DST3. - {SY}{SS}{JP}{UL}sct.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {DST1}, {DST2}, {DST3}, {SRC0} + {SY}{SS}{JP}{UL}sct.{SRC_TYPE}{DST_TYPE} {ROUND}{DM}{DST0}, {DST1}, {DST2}, {DST3}, {SRC0}